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Searched refs:SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h20978 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro
H A Dgc_11_0_0_sh_mask.h24940 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro
H A Dgc_12_0_0_sh_mask.h32746 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro
H A Dgc_10_1_0_sh_mask.h20140 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro
H A Dgc_11_0_3_sh_mask.h27417 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro
H A Dgc_10_3_0_sh_mask.h18295 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32_MASK … macro