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Searched refs:SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8911 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK 0xf macro
H A Dgfx_8_0_sh_mask.h10531 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK 0xf macro
H A Dgfx_8_1_sh_mask.h10929 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK 0xf macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12422 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_9_1_sh_mask.h13722 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_9_2_1_sh_mask.h13587 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_9_4_3_sh_mask.h15950 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_9_4_2_sh_mask.h25012 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_11_5_0_sh_mask.h22208 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_11_0_0_sh_mask.h26196 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_12_0_0_sh_mask.h33334 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_10_1_0_sh_mask.h19792 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_11_0_3_sh_mask.h28696 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro
H A Dgc_10_3_0_sh_mask.h18087 #define SPI_RESOURCE_RESERVE_CU_1__VGPR_MASK … macro