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Searched refs:SPI_ARB_CYCLES_1__TS3_DURATION_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7444 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK 0xffff0000L macro
H A Dgfx_7_2_sh_mask.h8791 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK 0xffff0000 macro
H A Dgfx_8_0_sh_mask.h10393 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK 0xffff0000 macro
H A Dgfx_8_1_sh_mask.h10791 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK 0xffff0000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12233 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_9_1_sh_mask.h13659 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_9_2_1_sh_mask.h13409 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_9_4_3_sh_mask.h15760 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_9_4_2_sh_mask.h24889 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_11_5_0_sh_mask.h13865 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_11_0_0_sh_mask.h17171 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_12_0_0_sh_mask.h27194 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_10_1_0_sh_mask.h19660 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_11_0_3_sh_mask.h19414 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro
H A Dgc_10_3_0_sh_mask.h18025 #define SPI_ARB_CYCLES_1__TS3_DURATION_MASK … macro