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Searched refs:SDMA1_STATUS_REG__INT_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h535 #define SDMA1_STATUS_REG__INT_IDLE_MASK 0x40000000L macro
H A Dsdma1_4_2_2_sh_mask.h537 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
H A Dsdma1_4_2_sh_mask.h533 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1477 #define SDMA1_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_2_4_sh_mask.h1641 #define SDMA1_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_3_0_1_sh_mask.h2159 #define SDMA1_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_3_0_sh_mask.h2463 #define SDMA1_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3040 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2746 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h3103 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h3015 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2819 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3124 #define SDMA1_STATUS_REG__INT_IDLE_MASK … macro