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Searched refs:SDMA1_STATUS2_REG__CMD_OP_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h667 #define SDMA1_STATUS2_REG__CMD_OP_MASK 0xFFFF0000L macro
H A Dsdma1_4_2_2_sh_mask.h685 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
H A Dsdma1_4_2_sh_mask.h681 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1727 #define SDMA1_STATUS2_REG__CMD_OP_MASK 0xffff0000 macro
H A Doss_3_0_1_sh_mask.h2253 #define SDMA1_STATUS2_REG__CMD_OP_MASK 0xffff0000 macro
H A Doss_3_0_sh_mask.h2551 #define SDMA1_STATUS2_REG__CMD_OP_MASK 0xffff0000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3190 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2905 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
H A Dgc_12_0_0_sh_mask.h3230 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
H A Dgc_10_1_0_sh_mask.h3153 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
H A Dgc_11_0_3_sh_mask.h2986 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro
H A Dgc_10_3_0_sh_mask.h3262 #define SDMA1_STATUS2_REG__CMD_OP_MASK … macro