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Searched refs:SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h555 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK 0x00000008L macro
H A Dsdma1_4_2_2_sh_mask.h557 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dsdma1_4_2_sh_mask.h553 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1487 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_2_4_sh_mask.h1651 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_3_0_1_sh_mask.h2169 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_3_0_sh_mask.h2473 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3060 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2769 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h3132 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h3035 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2845 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3144 #define SDMA1_STATUS1_REG__CE_RREQ_IDLE_MASK … macro