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Searched refs:SDMA0_STATUS_REG__REG_IDLE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h514 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h515 #define SDMA0_STATUS_REG__REG_IDLE_MASK 0x00000002L macro
H A Dsdma0_4_2_2_sh_mask.h521 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dsdma0_4_2_sh_mask.h515 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h911 #define SDMA0_STATUS_REG__REG_IDLE_MASK 0x2 macro
H A Doss_2_4_sh_mask.h991 #define SDMA0_STATUS_REG__REG_IDLE_MASK 0x2 macro
H A Doss_3_0_1_sh_mask.h1009 #define SDMA0_STATUS_REG__REG_IDLE_MASK 0x2 macro
H A Doss_3_0_sh_mask.h1515 #define SDMA0_STATUS_REG__REG_IDLE_MASK 0x2 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h206 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h202 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h191 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h170 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h223 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h199 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h224 #define SDMA0_STATUS_REG__REG_IDLE_MASK … macro