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Searched refs:SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h648 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h649 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK 0x00000004L macro
H A Dsdma0_4_2_2_sh_mask.h657 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dsdma0_4_2_sh_mask.h651 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1063 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK 0x4 macro
H A Doss_2_4_sh_mask.h1153 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK 0x4 macro
H A Doss_3_0_1_sh_mask.h1173 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK 0x4 macro
H A Doss_3_0_sh_mask.h1679 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK 0x4 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h327 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h316 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h304 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h363 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h334 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h328 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE_MASK … macro