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Searched refs:RS1 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/arch/sparc/crypto/
H A Dopcodes.h11 #define RS1(x) (FPD_ENCODE(x) << 14) macro
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
49 .word (F3F(2, 0x36, 0x130)|RS1(a)|RS2(b)|RD(c));
51 .word (F3F(2, 0x36, 0x131)|RS1(a)|RS2(b)|RD(c));
54 .word (F3F(2, 0x36, 0x134)|RS1(a)|RD(b));
56 .word (F3F(2, 0x36, 0x135)|RS1(a)|RD(b));
[all …]
/linux-6.15/arch/riscv/include/asm/
H A Dinsn-def.h140 __RD(0), RS1(vaddr), RS2(asid))
144 __RD(0), RS1(gaddr), RS2(vmid))
148 RD(dest), RS1(addr), __RS2(3))
152 RD(dest), RS1(addr), __RS2(0))
157 RD(dest), RS1(addr), __RS2(0))
165 __RD(0), RS1(vaddr), RS2(asid))
177 __RD(0), RS1(vaddr), RS2(asid))
185 RS1(base), SIMM12(0))
189 RS1(base), SIMM12(1))
193 RS1(base), SIMM12(2))
[all …]
/linux-6.15/arch/sparc/net/
H A Dbpf_jit_comp_32.c26 #define RS1(X) ((X) << 14) macro
113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \
118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \
123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \
140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \
161 _insn |= RS1(r_A) | RD(r_A); \
262 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
268 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
274 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
280 *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
[all …]
H A Dbpf_jit_comp_64.c55 #define RS1(X) ((X) << 14) macro
263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx); in emit_reg_move()
295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx); in emit_alu3()
304 insn |= RS1(dst) | RD(dst); in emit_alu_K()
323 insn |= RS1(src) | RD(dst); in emit_alu3_K()
613 emit(OR | RS1(dest) | RS2(tmp) | RD(dest), ctx); in emit_loadimm64()
647 emit(SUBCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
653 emit(ANDCC | RS1(R1) | RS2(R2) | RD(G0), CTX)
998 emit(SUB | RS1(0) | RS2(dst) | RD(dst), ctx); in build_insn()
1285 emit(opcode | RS1(src) | rs2 | RD(dst), ctx); in build_insn()
[all …]
/linux-6.15/arch/sparc/kernel/
H A Dvisemul.c378 rs1 = fetch_reg(RS1(insn), regs); in array()
411 rs1 = fetch_reg(RS1(insn), regs); in bmask()
430 rs1 = fpd_regval(f, RS1(insn)); in bshuffle()
454 rs1 = fpd_regval(f, RS1(insn)); in pdist()
510 rs1 = fpd_regval(f, RS1(insn)); in pformat()
572 rs1 = fps_regval(f, RS1(insn)); in pformat()
598 rs1 = fps_regval(f, RS1(insn)); in pmul()
623 rs1 = fps_regval(f, RS1(insn)); in pmul()
647 rs1 = fpd_regval(f, RS1(insn)); in pmul()
677 rs1 = fps_regval(f, RS1(insn)); in pmul()
[all …]
/linux-6.15/arch/arm/include/debug/
H A Dvexpress.S28 @ - all other (RS1 complaint) tiles use UART mapped
40 @ RS1 memory map
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dsff,sfp.yaml67 GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)
/linux-6.15/arch/arm/boot/dts/arm/
H A Dvexpress-v2m-rs1.dtsi10 * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
H A Dvexpress-v2m.dtsi14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
/linux-6.15/arch/arm/
H A DKconfig.debug1289 the motherboard's memory map variant (original or RS1) and then
1304 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1309 of the tiles using the RS1 memory map, including all new A-class