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Searched refs:RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9136 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h9686 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT 0x2 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23444 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_9_1_sh_mask.h24731 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h24792 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h27053 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h22233 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h31454 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h35896 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h21478 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h33846 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h39226 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h32864 #define RLC_SRM_GPM_COMMAND__INDEX_CNTL_NUM__SHIFT … macro