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Searched refs:RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3256 tmp |= RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK; in gfx_v7_0_enable_lbpw()
3258 tmp &= ~RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK; in gfx_v7_0_enable_lbpw()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7144 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK 0x00000001L macro
H A Dgfx_7_2_sh_mask.h7765 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h8609 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h9167 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK 0x1 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22916 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h24203 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h24214 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h26475 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h21674 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h33371 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h32318 #define RLC_LB_CNTL__LOAD_BALANCE_ENABLE_MASK … macro