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Searched refs:RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9395 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK 0xff0000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27315 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_9_1_sh_mask.h28598 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_9_2_1_sh_mask.h28939 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_9_4_3_sh_mask.h30698 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_9_4_2_sh_mask.h14512 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_11_0_0_sh_mask.h38166 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_10_1_0_sh_mask.h39862 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_11_0_3_sh_mask.h36519 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro
H A Dgc_10_3_0_sh_mask.h36579 #define RLC_GPU_IOV_CFG_REG1__NEXT_FCN_ID_MASK … macro