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Searched refs:RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9462 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT 0x1f macro
H A Dgfx_8_1_sh_mask.h9940 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT 0x1f macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27331 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_9_1_sh_mask.h28614 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h28955 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h30714 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h14528 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h39878 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h36537 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h36595 #define RLC_GPU_IOV_ACTIVE_FCN_ID__PF_VF__SHIFT … macro