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Searched refs:RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7126 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK 0xffffffc0L macro
H A Dgfx_7_2_sh_mask.h7835 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK 0xffffffc0 macro
H A Dgfx_8_0_sh_mask.h8737 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK 0xffffffc0 macro
H A Dgfx_8_1_sh_mask.h9289 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK 0xffffffc0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23048 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_9_1_sh_mask.h24335 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_9_2_1_sh_mask.h24386 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_9_4_3_sh_mask.h26643 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_9_4_2_sh_mask.h21839 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_11_5_0_sh_mask.h29964 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_11_0_0_sh_mask.h34336 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_12_0_0_sh_mask.h20070 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_10_1_0_sh_mask.h33495 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_11_0_3_sh_mask.h37579 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro
H A Dgc_10_3_0_sh_mask.h32516 #define RLC_GPU_CLOCK_32_RES_SEL__RESERVED_MASK … macro