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Searched refs:RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8116 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT 0x14 macro
H A Dgfx_8_0_sh_mask.h9028 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT 0x14 macro
H A Dgfx_8_1_sh_mask.h9568 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT 0x14 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19814 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h21121 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h21048 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h23178 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h13254 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h23200 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h27167 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h14996 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27786 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29688 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h26065 #define RLC_GPM_PERF_COUNT_0__ENABLE__SHIFT … macro