Searched refs:RLC_CNTL__RLC_ENABLE_F32_MASK (Results 1 – 22 of 22) sorted by relevance
2445 if (data & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v6_0_halt_rlc()2446 data &= ~RLC_CNTL__RLC_ENABLE_F32_MASK; in gfx_v6_0_halt_rlc()2465 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v6_0_rlc_start()
3307 if (data & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v7_0_halt_rlc()3310 data &= ~RLC_CNTL__RLC_ENABLE_F32_MASK; in gfx_v7_0_halt_rlc()3385 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v7_0_rlc_start()
1355 if (!(rlc_setting & RLC_CNTL__RLC_ENABLE_F32_MASK)) in gfx_v9_4_3_is_rlc_enabled()
1296 WREG32_SOC15(GC, 0, regRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v12_0_rlc_backdoor_autoload_enable()
5515 if (!(rlc_setting & RLC_CNTL__RLC_ENABLE_F32_MASK)) in gfx_v8_0_is_rlc_enabled()
4867 if (!(rlc_setting & RLC_CNTL__RLC_ENABLE_F32_MASK)) in gfx_v9_0_is_rlc_enabled()
5835 if (tmp & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v10_0_rlc_backdoor_autoload_enable()
7094 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x00000001L macro
7667 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
8477 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
9031 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
22733 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
24020 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
24023 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
26279 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
21497 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
29654 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
34026 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
19748 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
33196 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
37265 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
32128 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro