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Searched refs:RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK (Results 1 – 23 of 23) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c2641 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v9_4_3_xcc_update_coarse_grain_clock_gating()
2657 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v9_4_3_xcc_update_coarse_grain_clock_gating()
2754 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v9_4_3_get_clockgating_state()
H A Dgfx_v6_0.c2562 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v6_0_enable_cgcg()
2571 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v6_0_enable_cgcg()
H A Dgfx_v9_0.c5079 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v9_0_update_coarse_grain_clock_gating()
5082 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v9_0_update_coarse_grain_clock_gating()
5098 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v9_0_update_coarse_grain_clock_gating()
5292 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v9_0_get_clockgating_state()
H A Dgfx_v12_0.c3903 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_0_update_coarse_grain_clock_gating()
3965 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_0_update_coarse_grain_clock_gating()
4133 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v12_0_get_clockgating_state()
H A Dgfx_v7_0.c3510 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v7_0_enable_cgcg()
3522 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v7_0_enable_cgcg()
H A Dgfx_v8_0.c5435 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v8_0_get_clockgating_state()
5728 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v8_0_update_coarse_grain_clock_gating()
5780 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | in gfx_v8_0_update_coarse_grain_clock_gating()
H A Dgfx_v11_0.c5259 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5321 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5552 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v11_0_get_clockgating_state()
H A Dgfx_v10_0.c8051 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v10_0_update_coarse_grain_clock_gating()
8071 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v10_0_update_coarse_grain_clock_gating()
8479 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v10_0_get_clockgating_state()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7060 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x00000001L macro
H A Dgfx_7_2_sh_mask.h7887 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h8805 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h9355 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23127 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_1_sh_mask.h24414 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h24475 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_4_3_sh_mask.h26736 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_4_2_sh_mask.h21924 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_5_0_sh_mask.h30070 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_0_0_sh_mask.h34442 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_12_0_0_sh_mask.h20174 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_10_1_0_sh_mask.h33584 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_0_3_sh_mask.h37735 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_10_3_0_sh_mask.h32589 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro