Searched refs:RISCV_RELEASE_BARRIER (Results 1 – 3 of 3) sorted by relevance
| /linux-6.15/arch/riscv/include/asm/ |
| H A D | fence.h | 11 #define RISCV_RELEASE_BARRIER RISCV_FENCE_ASM(rw, w) macro
15 #define RISCV_RELEASE_BARRIER macro
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| H A D | cmpxchg.h | 105 _arch_xchg(ptr, x, "", "", RISCV_RELEASE_BARRIER, "", "")
274 SC_PREPEND(RISCV_RELEASE_BARRIER), SC_APPEND(""), \
275 CAS_PREPEND(RISCV_RELEASE_BARRIER), CAS_APPEND(""))
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| H A D | atomic.h | 25 __asm__ __volatile__(RISCV_RELEASE_BARRIER "" ::: "memory");
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