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Searched refs:REG_SET_FIELD (Results 1 – 25 of 121) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v3_0_3.c223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs()
226 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs()
241 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs()
245 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs()
267 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_enable_system_domain()
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
314 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config()
[all …]
H A Dgfxhub_v2_0.c217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs()
235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs()
261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_0_enable_system_domain()
294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
[all …]
H A Dmmhub_v3_0_2.c236 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_2_init_cache_regs()
254 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs()
258 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs()
280 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_enable_system_domain()
322 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
324 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
329 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config()
[all …]
H A Dgfxhub_v3_0.c218 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs()
221 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs()
236 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs()
240 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs()
262 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_enable_system_domain()
301 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
305 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config()
[all …]
H A Dgfxhub_v11_5_0.c221 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v11_5_0_init_cache_regs()
224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v11_5_0_init_cache_regs()
239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v11_5_0_init_cache_regs()
243 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v11_5_0_init_cache_regs()
265 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v11_5_0_enable_system_domain()
304 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v11_5_0_setup_vmid_config()
[all …]
H A Dgfxhub_v12_0.c226 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v12_0_init_cache_regs()
229 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v12_0_init_cache_regs()
244 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v12_0_init_cache_regs()
248 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v12_0_init_cache_regs()
270 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v12_0_enable_system_domain()
309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
313 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
315 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
317 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v12_0_setup_vmid_config()
[all …]
H A Dmmhub_v3_3.c234 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_3_init_cache_regs()
252 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_3_init_cache_regs()
256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_3_init_cache_regs()
278 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_3_enable_system_domain()
315 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
317 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
320 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
322 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
324 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
326 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_3_setup_vmid_config()
[all …]
H A Dmmhub_v3_0_1.c237 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_1_init_cache_regs()
255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
259 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs()
281 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_enable_system_domain()
317 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
319 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
322 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
324 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
326 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
328 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config()
[all …]
H A Dgfxhub_v1_0.c198 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
202 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs()
228 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain()
269 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
271 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
274 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
276 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
280 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
359 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_0_gart_disable()
[all …]
H A Dmmhub_v4_1_0.c245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v4_1_0_init_cache_regs()
263 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v4_1_0_init_cache_regs()
267 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v4_1_0_init_cache_regs()
289 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v4_1_0_enable_system_domain()
331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
336 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
338 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
340 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
342 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v4_1_0_setup_vmid_config()
[all …]
H A Dmmhub_v3_0.c244 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_init_cache_regs()
262 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs()
266 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs()
288 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_enable_system_domain()
330 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
335 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
337 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
339 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
341 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config()
[all …]
H A Dmmhub_v2_0.c288 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_0_init_cache_regs()
306 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
310 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs()
332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_0_enable_system_domain()
374 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
376 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
379 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
381 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
383 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
385 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
[all …]
H A Dmmhub_v2_3.c212 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_3_init_cache_regs()
230 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
234 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs()
256 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_3_enable_system_domain()
292 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
294 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
297 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
299 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
301 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
303 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config()
[all …]
H A Dhdp_v7_0.c62 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v7_0_update_clock_gating()
67 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating()
69 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating()
71 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v7_0_update_clock_gating()
89 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
92 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
96 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
99 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
103 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
106 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v7_0_update_clock_gating()
[all …]
H A Dhdp_v5_2.c69 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating()
71 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating()
76 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v5_2_update_mem_power_gating()
98 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
101 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
105 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
108 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
112 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
115 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating()
132 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating()
[all …]
H A Dhdp_v6_0.c68 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v6_0_update_clock_gating()
76 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating()
78 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating()
80 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating()
98 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
101 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
105 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
108 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
112 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
115 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating()
[all …]
H A Dhdp_v5_0.c74 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
76 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
107 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
111 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
114 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
118 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
123 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
127 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating()
145 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating()
[all …]
H A Dgfxhub_v2_1.c223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
226 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs()
241 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
245 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs()
267 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_1_enable_system_domain()
306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
312 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
314 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
[all …]
H A Dih_v6_0.c101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
219 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl()
221 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl()
340 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v6_0_irq_init()
373 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v6_0_irq_init()
681 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state()
683 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state()
685 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state()
687 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state()
[all …]
H A Dnbio_v7_9.c106 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
109 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
112 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
123 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
126 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
129 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
140 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
143 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
146 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
157 doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl, in nbio_v7_9_sdma_doorbell_range()
[all …]
H A Dlsdma_v6_0.c56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_copy_mem()
57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_copy_mem()
58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_copy_mem()
59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_copy_mem()
60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v6_0_copy_mem()
62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v6_0_copy_mem()
88 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_fill_mem()
89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_fill_mem()
90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_fill_mem()
91 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_fill_mem()
[all …]
H A Dlsdma_v7_0.c56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v7_0_copy_mem()
57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v7_0_copy_mem()
58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v7_0_copy_mem()
59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v7_0_copy_mem()
60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v7_0_copy_mem()
62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v7_0_copy_mem()
88 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v7_0_fill_mem()
89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v7_0_fill_mem()
90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v7_0_fill_mem()
91 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v7_0_fill_mem()
[all …]
H A Dih_v6_1.c101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
191 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_1_rb_cntl()
193 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_1_rb_cntl()
312 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v6_1_irq_init()
345 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v6_1_irq_init()
660 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state()
662 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state()
664 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state()
666 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_1_update_clockgating_state()
[all …]
H A Dih_v7_0.c101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int()
191 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v7_0_rb_cntl()
193 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v7_0_rb_cntl()
312 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v7_0_irq_init()
345 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v7_0_irq_init()
650 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state()
652 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state()
654 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state()
656 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v7_0_update_clockgating_state()
[all …]
H A Dgfxhub_v1_2.c247 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs()
251 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_2_xcc_init_cache_regs()
282 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_enable_system_domain()
349 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
351 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
354 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
356 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
358 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
372 tmp = REG_SET_FIELD( in gfxhub_v1_2_xcc_setup_vmid_config()
460 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_2_xcc_gart_disable()
[all …]

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