Home
last modified time | relevance | path

Searched refs:REG_PTR (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/arch/riscv/kernel/
H A Dtraps_misaligned.c144 #define REG_PTR(insn, pos, regs) \ macro
147 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
148 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
149 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
150 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
151 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
152 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
153 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
/linux-6.15/arch/riscv/kvm/
H A Dvcpu_insn.c123 #define REG_PTR(insn, pos, regs) \ macro
128 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
129 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
130 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
131 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
132 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
133 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
134 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
/linux-6.15/arch/alpha/kernel/
H A Dpc873xx.h11 #define REG_PTR 0x02 macro