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Searched refs:REG_INT_ENABLE (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/pinctrl/
H A Dpinctrl-microchip-sgpio.c43 REG_INT_ENABLE, enumerator
656 ena = sgpio_readl(bank->priv, REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
657 sgpio_writel(bank->priv, ena & ~BIT(addr.port), REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
670 sgpio_writel(bank->priv, ena, REG_INT_ENABLE, addr.bit); in microchip_sgpio_irq_settype()
696 microchip_sgpio_irq_setreg(data, REG_INT_ENABLE, true); in microchip_sgpio_irq_mask()
705 microchip_sgpio_irq_setreg(data, REG_INT_ENABLE, false); in microchip_sgpio_irq_unmask()
891 sgpio_writel(priv, 0, REG_INT_ENABLE, i); in microchip_sgpio_register_bank()
/linux-6.15/drivers/net/dsa/microchip/
H A Dksz8_reg.h368 #define REG_INT_ENABLE 0x7D macro
H A Dksz8.c1918 ret = ksz_rmw8(dev, REG_INT_ENABLE, INT_PME, 0); in ksz8_setup()
/linux-6.15/drivers/regulator/
H A Dtps6524x-regulator.c79 #define REG_INT_ENABLE 0x6 macro
/linux-6.15/drivers/net/ethernet/airoha/
H A Dairoha_regs.h425 #define REG_INT_ENABLE(_n) \ macro
H A Dairoha_eth.c49 airoha_qdma_wr(qdma, REG_INT_ENABLE(index), qdma->irqmask[index]); in airoha_qdma_set_irqmask()
53 airoha_qdma_rr(qdma, REG_INT_ENABLE(index)); in airoha_qdma_set_irqmask()