Searched refs:RADEON_NUM_RINGS (Results 1 – 9 of 9) sorted by relevance
453 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_any_seq_signaled()488 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()509 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()535 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_timeout()594 uint64_t seq[RADEON_NUM_RINGS]; in radeon_fence_wait_any()598 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_any()631 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_next()661 uint64_t seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_empty()788 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_note_sync()865 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_fence_driver_init_ring()[all …]
48 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sync_create()128 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sync_rings()
1296 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_device_init()1299 rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); in radeon_device_init()1605 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_suspend_kms()1768 unsigned ring_sizes[RADEON_NUM_RINGS]; in radeon_gpu_reset()1769 uint32_t *ring_data[RADEON_NUM_RINGS]; in radeon_gpu_reset()1788 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()1806 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
130 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()184 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
179 struct radeon_fence *best[RADEON_NUM_RINGS] = {}; in radeon_vm_grab_id()1005 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_vm_bo_update()1179 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_init()1262 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_fini()
263 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_ib_ring_tests()
158 #define RADEON_NUM_RINGS 8 macro368 uint64_t sync_seq[RADEON_NUM_RINGS];573 struct radeon_fence *sync_to[RADEON_NUM_RINGS];755 atomic_t ring_int[RADEON_NUM_RINGS];904 struct radeon_vm_id ids[RADEON_NUM_RINGS];1880 const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];2367 struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];2371 struct radeon_ring ring[RADEON_NUM_RINGS];
530 for (i = 1; i < RADEON_NUM_RINGS; ++i) { in radeon_test_syncing()
267 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_pm_set_clocks()1149 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_dpm_change_power_state_locked()1866 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_dynpm_idle_work_handler()