| /linux-6.15/tools/perf/arch/arm/tests/ |
| H A D | regs_load.S | 10 #define R6 0x30 macro 47 str r6, [r0, #R6]
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| /linux-6.15/tools/perf/arch/powerpc/tests/ |
| H A D | regs_load.S | 11 #define R6 6 * 8 macro 50 std 6, R6(3)
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| /linux-6.15/Documentation/bpf/ |
| H A D | linux-notes.rst | 65 * Register R6 is an implicit input that must contain a pointer to a 78 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + imm)) 84 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + src + imm))
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| H A D | verifier.rst | 35 Since R6-R9 are callee saved, their state is preserved across the call. 39 bpf_mov R6 = 1 41 bpf_mov R0 = R6 44 is a correct program. If there was R1 instead of R6, it would have 65 bpf_ld R0 = *(u32 *)(R6 + 8) 67 intends to load a word from address R6 + 8 and store it into R0 68 If R6=PTR_TO_CTX, via is_valid_access() callback the verifier will know 71 If R6=PTR_TO_STACK, then access should be aligned and be within 88 Pointer register spill/fill is tracked as well, since four (R6-R9)
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| H A D | classic_vs_extended.rst | 75 a return value of the function. Since R6 - R9 are callee saved, their state 124 R6 - rbx 135 bpf_mov R6, R1 /* save ctx */ 142 bpf_mov R1, R6 /* restore ctx for next call */
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| /linux-6.15/lib/ |
| H A D | test_bpf.c | 45 #define R6 BPF_REG_6 macro 3906 BPF_ALU64_REG(BPF_ADD, R6, R6), 4052 BPF_ALU32_REG(BPF_ADD, R6, R6), 4265 BPF_ALU64_REG(BPF_XOR, R6, R6), 4270 BPF_ALU64_REG(BPF_SUB, R6, R6), 4369 BPF_MOV64_REG(R6, R5), 4370 BPF_MOV64_REG(R7, R6), 4409 BPF_MOV64_REG(R6, R5), 4410 BPF_MOV64_REG(R7, R6), 11944 BPF_ALU64_IMM(BPF_MOV, R6, R6), \ [all …]
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| /linux-6.15/arch/powerpc/kernel/ |
| H A D | fpu.S | 150 2: SAVE_32FPVSRS(0, R4, R6) 153 REST_1FPVSR(0, R4, R6)
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| /linux-6.15/drivers/media/i2c/ |
| H A D | wm8739.c | 36 R5 = 5, R6, R7, R8, R9, R15 = 15, enumerator 223 wm8739_write(sd, R6, 0x000); in wm8739_probe()
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| /linux-6.15/arch/powerpc/mm/nohash/ |
| H A D | tlb_low.S | 180 PPC_ICBT(0,R6,R7) /* touch next cache line */ 182 PPC_ICBT(0,R6,R7) /* touch next cache line */ 184 PPC_ICBT(0,R6,R7) /* touch next cache line */
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| /linux-6.15/tools/perf/arch/arm/util/ |
| H A D | unwind-libdw.c | 26 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
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| /linux-6.15/tools/perf/arch/loongarch/util/ |
| H A D | unwind-libdw.c | 28 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
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| /linux-6.15/Documentation/bpf/standardization/ |
| H A D | abi.rst | 21 * R6 - R9: callee saved registers that function calls will preserve
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| /linux-6.15/tools/perf/arch/s390/util/ |
| H A D | unwind-libdw.c | 32 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
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| /linux-6.15/tools/perf/arch/powerpc/util/ |
| H A D | unwind-libdw.c | 35 dwarf_regs[6] = REG(R6); in libdw__arch_set_initial_registers()
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| /linux-6.15/drivers/net/hamradio/ |
| H A D | z8530.h | 13 #define R6 6 macro
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| /linux-6.15/drivers/tty/serial/ |
| H A D | zs.h | 66 #define R6 6 macro
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| H A D | ip22zilog.h | 45 #define R6 6 macro
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| H A D | sunzilog.h | 37 #define R6 6 macro
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| H A D | pmac_zilog.h | 123 #define R6 6 macro
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| H A D | sunzilog.c | 210 write_zsreg(channel, R6, regs[R6]); in __load_zsregs() 1348 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw() 1364 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
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| /linux-6.15/arch/powerpc/platforms/pseries/ |
| H A D | hvCall.S | 39 std r6,STK_PARAM(R6)(r1); \ 51 ld r6,STACK_FRAME_MIN_SIZE+STK_PARAM(R6)(r1); \
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| /linux-6.15/Documentation/devicetree/bindings/sound/ |
| H A D | wlf,wm8903.yaml | 49 description: Default register value for R6 (Mic Bias).
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| H A D | wlf,wm8904.yaml | 67 Default register values for R6/R7 (Mic Bias Control).
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| /linux-6.15/arch/powerpc/kvm/ |
| H A D | bookehv_interrupts.S | 181 PPC_STL r6, VCPU_GPR(R6)(r4) 292 PPC_STL r6, VCPU_GPR(R6)(r11) 319 PPC_STL r6, VCPU_GPR(R6)(r11) 666 PPC_LL r6, VCPU_GPR(R6)(r4)
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| H A D | booke_interrupts.S | 52 stw r6, VCPU_GPR(R6)(r4) 476 lwz r6, VCPU_GPR(R6)(r4)
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