Home
last modified time | relevance | path

Searched refs:R1 (Results 1 – 25 of 127) sorted by relevance

123456

/linux-6.15/arch/x86/crypto/
H A Dtwofish-x86_64-asm_64.S207 pushq R1
216 movq (R3), R1
222 shr $32, R1
248 shl $32, R1
249 xor R0, R1
254 popq R1
260 pushq R1
274 shr $32, R1
300 shl $32, R1
301 xor R0, R1
[all …]
H A Dtwofish-i586-asm_32.S231 encrypt_round(R0,R1,R2,R3,0);
232 encrypt_round(R2,R3,R0,R1,8);
233 encrypt_round(R0,R1,R2,R3,2*8);
234 encrypt_round(R2,R3,R0,R1,3*8);
235 encrypt_round(R0,R1,R2,R3,4*8);
236 encrypt_round(R2,R3,R0,R1,5*8);
237 encrypt_round(R0,R1,R2,R3,6*8);
238 encrypt_round(R2,R3,R0,R1,7*8);
239 encrypt_round(R0,R1,R2,R3,8*8);
240 encrypt_round(R2,R3,R0,R1,9*8);
[all …]
H A Dpoly1305-x86_64-cryptogams.pl2261 vpermd $D1,$T2,$R1
2400 vpermd $R1,$M0,$R1
2415 vpaddd $R1,$S1,$S1
2596 vpsrlq \$32,$R1,$R1
3100 vmovdqa $R1,$H1
3167 vpunpcklqdq $R1,$H1,$R1 # 1,2
3186 vinserti128 \$1,%x#$R1,$H1,$R1 # 1,2,3,4
3190 vpermq \$0b11011000,$R1,$R1 # 1,3,2,4
3208 vpbroadcastq %x#$R1,$R1
3222 vpsrldq \$8,$R1,$R1
[all …]
H A Dsm3-avx-asm_64.S215 #define R1(a, b, c, d, e, f, g, h, round, widx, wtype) \ macro
373 R1(a, b, c, d, e, f, g, h, 0, 0, IW); LOAD_W_XMM_2();
374 R1(d, a, b, c, h, e, f, g, 1, 1, IW);
375 R1(c, d, a, b, g, h, e, f, 2, 2, IW);
376 R1(b, c, d, a, f, g, h, e, 3, 3, IW); LOAD_W_XMM_3();
379 R1(a, b, c, d, e, f, g, h, 4, 0, IW);
380 R1(d, a, b, c, h, e, f, g, 5, 1, IW);
381 R1(c, d, a, b, g, h, e, f, 6, 2, IW); SCHED_W_0(12, W0, W1, W2, W3, W4, W5);
382 R1(b, c, d, a, f, g, h, e, 7, 3, IW); SCHED_W_1(12, W0, W1, W2, W3, W4, W5);
385 R1(a, b, c, d, e, f, g, h, 8, 0, IW); SCHED_W_2(12, W0, W1, W2, W3, W4, W5);
[all …]
/linux-6.15/lib/
H A Dtest_bpf.c3841 BPF_ALU64_REG(BPF_ADD, R1, R1),
3987 BPF_ALU32_REG(BPF_ADD, R1, R1),
4236 BPF_ALU64_REG(BPF_XOR, R1, R1),
4241 BPF_ALU64_REG(BPF_SUB, R1, R1),
4286 BPF_ALU64_REG(BPF_SUB, R1, R1),
14068 BPF_JMP_REG(BPF_JEQ, R1, R1, 1),
14080 BPF_JMP_REG(BPF_JGE, R1, R1, 1),
14092 BPF_JMP_REG(BPF_JLE, R1, R1, 1),
14128 BPF_JMP_REG(BPF_JNE, R1, R1, 1),
14140 BPF_JMP_REG(BPF_JGT, R1, R1, 1),
[all …]
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8365-pinctrl.yaml83 100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
84 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
85 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
86 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
98 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
99 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
100 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
156 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
157 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
158 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
[all …]
H A Dmediatek,mt6795-pinctrl.yaml101 description: mt6795 pull down PUPD/R0/R1 type define value.
111 description: mt6795 pull up PUPD/R0/R1 type define value.
133 Pull up settings for 2 pull resistors, R0 and R1. User can
136 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
137 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
138 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
139 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
148 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
149 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
150 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
H A Dmediatek,mt6779-pinctrl.yaml162 Pull up settings for 2 pull resistors, R0 and R1. User can
165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
168 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
174 Pull down settings for 2 pull resistors, R0 and R1. User can
177 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
178 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
179 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
180 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
H A Dmediatek,mt8183-pinctrl.yaml146 Pull up settings for 2 pull resistors, R0 and R1. User can
149 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
150 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
151 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
152 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
158 Pull down settings for 2 pull resistors, R0 and R1. User can
161 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
162 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
163 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
164 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
H A Dmediatek,mt7981-pinctrl.yaml357 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
366 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
389 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments
391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
394 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
403 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
404 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
405 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
H A Dmediatek,mt7986-pinctrl.yaml303 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
312 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
335 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments
337 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
338 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
339 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
340 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
349 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
350 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
351 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
H A Dmediatek,mt7988-pinctrl.yaml415 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
424 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
447 Pull up settings for 2 pull resistors, R0 and R1. Valid arguments
449 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
450 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
451 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
452 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
461 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
462 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
463 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
/linux-6.15/arch/arm/crypto/
H A Dpoly1305-armv4.pl532 vdup.32 $R1,r3
562 vmlal.u32 $D2,$R1,${R1}[1]
674 vtrn.32 $R1,$D1#lo
679 vshl.u32 $S1,$R1,#2
682 vadd.i32 $S1,$S1,$R1
702 vmov $R1,$D1#lo
1076 vmlal.u32 $D3,$H2#hi,$R1
1078 vmlal.u32 $D1,$H0#hi,$R1
1079 vmlal.u32 $D4,$H3#hi,$R1
1080 vmlal.u32 $D2,$H1#hi,$R1
[all …]
/linux-6.15/tools/testing/selftests/net/
H A Dpmtu.sh1179 mtu "${ns_a}" veth_A-R1 2000
1182 mtu "${ns_b}" veth_B-R1 1400
1200 mtu "${ns_a}" veth_A-R1 1300
1209 mtu "${ns_a}" veth_A-R1 1700
1263 mtu "${ns_a}" veth_A-R1 2000
1266 mtu "${ns_b}" veth_B-R1 1400
1308 mtu "${ns_a}" veth_A-R1 2000
1311 mtu "${ns_b}" veth_B-R1 1400
1884 trace "${ns_a}" veth_A-R1 "${ns_b}" veth_B-R1 \
1918 trace "${ns_a}" veth_A-R1 "${ns_b}" veth_B-R1 \
[all …]
/linux-6.15/arch/arm64/crypto/
H A Dpoly1305-armv8.pl576 umull $ACC1,$IN23_0,${R1}[2]
590 umlal $ACC2,$IN23_1,${R1}[2]
599 umlal $ACC3,$IN23_2,${R1}[2]
759 umull2 $ACC3,$IN23_2,${R1}
769 umlal2 $ACC1,$IN23_0,${R1}
774 umlal2 $ACC2,$IN23_1,${R1}
780 umlal2 $ACC4,$IN23_3,${R1}
797 umlal $ACC3,$IN01_2,${R1}
807 umlal $ACC1,$IN01_0,${R1}
815 umlal $ACC2,$IN01_1,${R1}
[all …]
H A Dsm3-neon-core.S155 #define R1(a, b, c, d, e, f, g, h, k, K_LOAD, round, widx, wtype, IOP, iop_param) \ macro
401 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 0, 0, IW, _, 0)
402 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 1, 1, IW, _, 0)
403 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 2, 2, IW, _, 0)
404 R1(rb, rc, rd, ra, rf, rg, rh, re, k_odd, _, 3, 3, IW, _, 0)
407 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 4, 0, IW, _, 0)
408 R1(rd, ra, rb, rc, rh, re, rf, rg, k_odd, _, 5, 1, IW, _, 0)
409 R1(rc, rd, ra, rb, rg, rh, re, rf, k_even, KL, 6, 2, IW, SCHED_W_W0W1W2W3W4W5_1, 12)
410 R1(rb, rc, rd, ra, rf, rg, rh, re, k_odd, _, 7, 3, IW, SCHED_W_W0W1W2W3W4W5_2, 12)
413 R1(ra, rb, rc, rd, re, rf, rg, rh, k_even, KL, 8, 0, IW, SCHED_W_W0W1W2W3W4W5_3, 12)
[all …]
/linux-6.15/arch/hexagon/kernel/
H A Dvm_entry.S207 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
214 memd(R29 + #_PT_ER_VMEL) = R1:0; \
216 R1.L = #LO(CHandler); \
220 R1.H = #HI(CHandler); \
239 R1:0 = G1:0; \
241 memd(R29 + #_PT_ER_VMEL) = R1:0; \
242 R1 = # ## #(CHandler); \
302 R1 = memw(THREADINFO_REG + #_THREAD_INFO_FLAGS); define
321 R1:0 = memd(R29 + #_PT_ER_VMEL);
327 G1:0 = R1:0;
[all …]
/linux-6.15/crypto/
H A Dsm3.c49 #define R1(a, b, c, d, e, f, g, h, t, w1, w2) \ macro
85 R1(a, b, c, d, e, f, g, h, K[0], I(0), I(4)); in sm3_transform()
86 R1(d, a, b, c, h, e, f, g, K[1], I(1), I(5)); in sm3_transform()
87 R1(c, d, a, b, g, h, e, f, K[2], I(2), I(6)); in sm3_transform()
88 R1(b, c, d, a, f, g, h, e, K[3], I(3), I(7)); in sm3_transform()
89 R1(a, b, c, d, e, f, g, h, K[4], W1(4), I(8)); in sm3_transform()
90 R1(d, a, b, c, h, e, f, g, K[5], W1(5), I(9)); in sm3_transform()
91 R1(c, d, a, b, g, h, e, f, K[6], W1(6), I(10)); in sm3_transform()
92 R1(b, c, d, a, f, g, h, e, K[7], W1(7), I(11)); in sm3_transform()
93 R1(a, b, c, d, e, f, g, h, K[8], W1(8), I(12)); in sm3_transform()
[all …]
/linux-6.15/arch/sparc/net/
H A Dbpf_jit_comp_32.c261 #define emit_cmp(R1, R2) \ argument
264 #define emit_cmpi(R1, IMM) \ argument
267 #define emit_btst(R1, R2) \ argument
270 #define emit_btsti(R1, IMM) \ argument
273 #define emit_sub(R1, R2, R3) \ argument
274 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
276 #define emit_subi(R1, IMM, R3) \ argument
279 #define emit_add(R1, R2, R3) \ argument
282 #define emit_addi(R1, IMM, R3) \ argument
285 #define emit_and(R1, R2, R3) \ argument
[all …]
/linux-6.15/Documentation/virt/kvm/arm/
H A Dhypercalls.rst36 | | (uint32) | R1 | Bitmap of available function numbers 32-63 |
60 | Arguments: | (uint64) | R1 | Reserved / Must be zero |
84 | Arguments: | (uint64) | R1 | Base IPA of memory region to share |
109 | Arguments: | (uint64) | R1 | Base IPA of memory region to unshare |
135 | Arguments: | (uint64) | R1 | Base IPA of MMIO memory region |
164 | | (uint64) | R1 | Bits [63:32] Reserved/Must be zero |
188 | Arguments: | (uint64) | R1 | selected implementation index |
198 | | (uint64) | R1 | MIDR_EL1 of the selected implementation |
/linux-6.15/Documentation/devicetree/bindings/regulator/
H A Drohm,bd71847-regulator.yaml121 # R1
127 # Vout_o = Vo - (Vpu - Vo)*R2/R1
128 # Linear_step = step_orig*(R1+R2)/R1
134 # R1 and R2 are resistor values.
139 the used pull-up voltage before R1.
144 the used R1 resistor.
H A Drohm,bd71837-regulator.yaml126 # R1
132 # Vout_o = Vo - (Vpu - Vo)*R2/R1
133 # Linear_step = step_orig*(R1+R2)/R1
139 # R1 and R2 are resistor values.
144 the used pull-up voltage before R1.
149 the used R1 resistor.
H A Dlltc,ltc3676.yaml40 steps. The output voltage thus ranges between 0.4125 * (1 + R1/R2) V
41 and 0.8 * (1 + R1/R2) V.
43 output 0.725 * (1 + R1/R2) V.
51 R1 and R2 of the feedback voltage divider in ohms.
73 R1 and R2 of the feedback voltage divider in ohms.
H A Dltc3589.txt18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
/linux-6.15/Documentation/bpf/
H A Dclassic_vs_extended.rst65 place function arguments into R1 to R5 registers to satisfy calling
67 to in-kernel function. If R1 - R5 registers are mapped to CPU registers
98 bpf_mov R2, R1
99 bpf_add R1, 1
108 already placed into R1 (e.g. on __bpf_prog_run() startup) and the programs
119 R1 - rdi
135 bpf_mov R6, R1 /* save ctx */
142 bpf_mov R1, R6 /* restore ctx for next call */
193 bpf_mov R1, 1
195 bpf_mov R0, R1
[all …]

123456