Searched refs:QUSB2PHY_INTR_CTRL (Results 1 – 2 of 2) sorted by relevance
135 QUSB2PHY_INTR_CTRL, enumerator192 [QUSB2PHY_INTR_CTRL] = 0xBC,205 [QUSB2PHY_INTR_CTRL] = 0xbc,234 [QUSB2PHY_INTR_CTRL] = 0x22c,276 [QUSB2PHY_INTR_CTRL] = 0x230,694 writel(intr_mask, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); in qusb2_phy_runtime_suspend()755 writel(0x0, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); in qusb2_phy_runtime_resume()
120 by the QUSB2PHY_INTR_CTRL register. The required DPSE/121 DMSE configuration is done in QUSB2PHY_INTR_CTRL register