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/linux-6.15/arch/arm64/boot/dts/freescale/
H A Dimx8mq-nitrogen.dts369 MX8MQ_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x19 /* Pin 19 */
370 MX8MQ_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19 /* Pin 21 */
371 MX8MQ_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x19 /* Pin 23 */
372 MX8MQ_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x19 /* Pin 25 */
373 MX8MQ_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x19 /* Pin 27 */
374 MX8MQ_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x19 /* Pin 29 */
375 MX8MQ_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 /* Pin 31 */
410 /* J13 Pin 2, WL_WAKE */
412 /* J13 Pin 4, WL_IRQ, not needed for Silex */
416 /* J13 Pin 41, BT_CLK_REQ */
[all …]
/linux-6.15/arch/arm/boot/dts/amlogic/
H A Dmeson8b-odroidc1.dts234 "J2 Header Pin 35", "J2 Header Pin 36",
235 "J2 Header Pin 32", "J2 Header Pin 31",
236 "J2 Header Pin 29", "J2 Header Pin 18",
237 "J2 Header Pin 22", "J2 Header Pin 16",
238 "J2 Header Pin 23", "J2 Header Pin 21",
239 "J2 Header Pin 19", "J2 Header Pin 33",
240 "J2 Header Pin 8", "J2 Header Pin 10",
241 "J2 Header Pin 15", "J2 Header Pin 13",
242 "J2 Header Pin 24", "J2 Header Pin 26",
245 "J2 Header Pin 7", "", "J2 Header Pin 12",
[all …]
/linux-6.15/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts384 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
385 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
386 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
387 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
388 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
390 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
414 "[SPI0_DIN]", /* Pin 10: SPI0_DI */
415 "[SPI0_DOUT]", /* Pin 14: SPI0_DO */
416 "[SPI0_CS]", /* Pin 12: SPI0_CS_N */
417 "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
[all …]
/linux-6.15/rust/kernel/alloc/
H A Dkbox.rs14 use core::pin::Pin;
255 pub fn into_pin(this: Self) -> Pin<Self> { in into_pin()
299 impl<T, A> From<Box<T, A>> for Pin<Box<T, A>> implementation
311 unsafe { Pin::new_unchecked(b) } in from()
344 type PinnedSelf = Pin<Self>;
394 impl<T: 'static, A> ForeignOwnable for Pin<Box<T, A>> implementation
398 type Borrowed<'a> = Pin<&'a T>;
399 type BorrowedMut<'a> = Pin<&'a mut T>;
409 unsafe { Pin::new_unchecked(Box::from_raw(ptr.cast())) } in from_foreign()
420 unsafe { Pin::new_unchecked(r) } in borrow()
[all …]
/linux-6.15/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4377.yaml45 GPIO that controls the Chip Enable Pin.
50 GPIO that controls the Enable Clock 1 Output Buffer Pin.
55 GPIO that controls the Enable Clock 2 Output Buffer Pin.
61 high_z - MUXOUT Pin set to high-Z.
62 lock_detect - MUXOUT Pin set to lock detector output.
63 muxout_low - MUXOUT Pin set to low.
64 f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2.
65 f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2.
66 muxout_high - MUXOUT Pin set to high.
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3588-friendlyelec-cm3588-nas.dts252 "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "",
261 "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "",
264 …"Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4…
265 …"Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2…
271 "", "HDMI-in detect [HDMIIRX_DET_L]", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]";
283 "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "",
293 …"Pin 35 [SPI4_MISO_M1/PWM10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pi…
294 "Pin 37 [SPI4_CS1_M1]", "USB3-A #2 [USB3_2_PWREN]", "DSI-Pin 12 [LCD_RST]", "Buzzer [PWM8_M0]",
296 "Pin 33 [PWM9_M0]", "DSI-Pin 10 [PWM2_M1/LCD_BL]", "Pin 07", "Pin 16",
297 "Pin 18", "Pin 29 [UART3_TX_M1/PWM12_M0]", "Pin 31 [UART3_RX_M1/PWM13_M0]", "Pin 12",
[all …]
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dmdio-mux-gpio.yaml57 interrupts = <10 8>; /* Pin 10, active low */
62 interrupts = <10 8>; /* Pin 10, active low */
67 interrupts = <10 8>; /* Pin 10, active low */
72 interrupts = <10 8>; /* Pin 10, active low */
84 interrupts = <12 8>; /* Pin 12, active low */
89 interrupts = <12 8>; /* Pin 12, active low */
94 interrupts = <12 8>; /* Pin 12, active low */
99 interrupts = <12 8>; /* Pin 12, active low */
/linux-6.15/rust/kernel/time/hrtimer/
H A Dtbox.rs59 impl<T, A> HrTimerPointer for Pin<Box<T, A>> implementation
64 T: for<'a> HrTimerCallback<Pointer<'a> = Pin<Box<T, A>>>,
75 unsafe { NonNull::new_unchecked(Box::into_raw(Pin::into_inner_unchecked(self))) }; in start()
91 impl<T, A> RawHrTimerCallback for Pin<Box<T, A>> implementation
95 T: for<'a> HrTimerCallback<Pointer<'a> = Pin<Box<T, A>>>,
98 type CallbackTarget<'a> = Pin<&'a mut T>;
116 let data_mut_ref = unsafe { Pin::new_unchecked(&mut *data_ptr) }; in run()
H A Dpin.rs10 use core::pin::Pin;
18 pub(crate) inner: Pin<&'a T>,
51 unsafe impl<'a, T> UnsafeHrTimerPointer for Pin<&'a T> implementation
73 impl<'a, T> RawHrTimerCallback for Pin<&'a T> implementation
100 let receiver_pin = unsafe { Pin::new_unchecked(receiver_ref) }; in run()
H A Dpin_mut.rs7 use core::{marker::PhantomData, pin::Pin, ptr::NonNull};
49 unsafe impl<'a, T> UnsafeHrTimerPointer for Pin<&'a mut T> implementation
77 impl<'a, T> RawHrTimerCallback for Pin<&'a mut T> implementation
104 let receiver_pin = unsafe { Pin::new_unchecked(receiver_ref) }; in run()
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,dove-pinctrl.txt64 pmu-nc Pin not driven by any PM function
65 pmu-low Pin driven low (0)
66 pmu-high Pin driven high (1)
67 pmic(sdi) Pin is used for PMIC SDI
68 cpu-pwr-down Pin is used for CPU_PWRDWN
69 standby-pwr-down Pin is used for STBY_PWRDWN
72 bat-fault Pin is used for BATTERY_FAULT
73 ext0-wakeup Pin is used for EXT0_WU
74 ext1-wakeup Pin is used for EXT0_WU
75 ext2-wakeup Pin is used for EXT0_WU
[all …]
H A Drenesas,rza1-ports.yaml7 title: Renesas RZ/A1 combined Pin and GPIO controller
14 The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
146 * Pin #0 on port #3 is configured as alternate function #6.
147 * Pin #2 on port #3 is configured as alternate function #4.
156 * Pin #4 on port #1 is configured as alternate function #1.
157 * Pin #5 on port #1 is configured as alternate function #1.
172 * Pin #0 on port #4 is configured as alternate function #2
182 * Pin #1 on port #4 is configured as alternate function #1
H A Dcnxt,cx92755-pinctrl.txt1 Conexant Digicolor CX92755 General Purpose Pin Mapping
7 === Pin Controller Node ===
12 - reg: Base address of the General Purpose Pin Mapping register block and the
34 === Pin Configuration Node ===
44 === Pin Group Node ===
56 Required Pin Group Node Properties:
/linux-6.15/rust/kernel/list/
H A Darc.rs12 use core::pin::Pin;
42 unsafe fn on_create_list_arc_from_unique(self: Pin<&mut Self>); in on_create_list_arc_from_unique()
103 ::core::pin::Pin::map_unchecked_mut(self, |me| &mut me.$field)
209 Self::from(Pin::from(unique)) in from()
213 impl<T, const ID: u64> From<Pin<UniqueArc<T>>> for ListArc<T, ID>
219 fn from(mut unique: Pin<UniqueArc<T>>) -> Self { in from()
241 Self::pair_from_pin_unique(Pin::from(unique)) in pair_from_unique()
249 mut unique: Pin<UniqueArc<T>>, in pair_from_pin_unique()
488 fn project_inner(self: Pin<&mut Self>) -> &mut AtomicBool { in project_inner()
491 unsafe { &mut Pin::into_inner_unchecked(self).inner } in project_inner()
[all …]
/linux-6.15/rust/pin-init/src/
H A Dalloc.rs7 use core::{mem::MaybeUninit, pin::Pin};
30 fn try_pin_init<E>(init: impl PinInit<T, E>) -> Result<Pin<Self>, E> in try_pin_init()
38 fn pin_init(init: impl PinInit<T>) -> Result<Pin<Self>, AllocError> { in pin_init()
82 fn try_pin_init<E>(init: impl PinInit<T, E>) -> Result<Pin<Self>, E> in try_pin_init()
100 fn try_pin_init<E>(init: impl PinInit<T, E>) -> Result<Pin<Self>, E> in try_pin_init()
114 Ok(unsafe { Pin::new_unchecked(this.assume_init()) }) in try_pin_init()
148 fn write_pin_init<E>(mut self, init: impl PinInit<T, E>) -> Result<Pin<Self::Initialized>, E> { in write_pin_init()
H A D__internal.rs171 pub fn init<E>(self: Pin<&mut Self>, init: impl PinInit<T, E>) -> Result<Pin<&mut T>, E> { in init()
173 let this = unsafe { Pin::into_inner_unchecked(self) }; in init()
186 Ok(unsafe { Pin::new_unchecked(this.value.assume_init_mut()) }) in init()
200 let mut slot: Pin<&mut StackInit<Foo>> = pin!(StackInit::uninit()); in stack_init_reuse()
201 let value: Result<Pin<&mut Foo>, core::convert::Infallible> = in stack_init_reuse()
208 let value: Result<Pin<&mut Foo>, core::convert::Infallible> = in stack_init_reuse()
/linux-6.15/samples/rust/
H A Drust_misc_device.rs98 use core::pin::Pin;
158 type Ptr = Pin<KBox<Self>>;
160 fn open(_file: &File, misc: &MiscDeviceRegistration<Self>) -> Result<Pin<KBox<Self>>> { in open()
176 fn ioctl(me: Pin<&RustMiscDevice>, _file: &File, cmd: u32, arg: usize) -> Result<isize> { in ioctl()
197 fn drop(self: Pin<&mut Self>) { in drop()
/linux-6.15/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs35l45.yaml105 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
106 2 = Pin acts as MDSYNC, direction controlled by MDSYNC
110 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
111 2 = Pin acts as open drain INT
113 4 = Pin acts as push-pull output INT. Active low.
114 5 = Pin acts as push-pull output INT. Active high.
118 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
H A Drt274.txt18 * DMIC1 Pin
19 * DMIC2 Pin
23 * HPO Pin
/linux-6.15/rust/kernel/
H A Dworkqueue.rs238 fn project(self: Pin<&mut Self>) -> &mut Option<T> { in project()
245 type Pointer = Pin<KBox<Self>>;
247 fn run(mut this: Pin<KBox<Self>>) { in run()
372 pub fn new(name: &'static CStr, key: Pin<&'static LockClassKey>) -> impl PinInit<Self> in new()
587 unsafe impl<T, const ID: u64> WorkItemPointer<ID> for Pin<KBox<T>> implementation
600 let pinned = unsafe { Pin::new_unchecked(boxed) }; in run()
607 unsafe impl<T, const ID: u64> RawWorkItem<ID> for Pin<KBox<T>> implementation
620 let boxed = unsafe { Pin::into_inner_unchecked(self) }; in __enqueue()
/linux-6.15/rust/kernel/sync/
H A Darc.rs32 pin::Pin,
345 pub fn into_unique_or_drop(self) -> Option<Pin<UniqueArc<T>>> { in into_unique_or_drop()
365 Some(Pin::from(UniqueArc { in into_unique_or_drop()
469 impl<T: ?Sized> From<Pin<UniqueArc<T>>> for Arc<T> {
470 fn from(item: Pin<UniqueArc<T>>) -> Self { in from()
472 unsafe { Pin::into_inner_unchecked(item).inner } in from()
692 type PinnedSelf = Pin<Self>;
723 fn write_pin_init<E>(mut self, init: impl PinInit<T, E>) -> Result<Pin<Self::Initialized>, E> { in write_pin_init()
798 ) -> core::result::Result<Pin<UniqueArc<T>>, E> { in pin_init_with()
809 impl<T: ?Sized> From<UniqueArc<T>> for Pin<UniqueArc<T>> { implementation
[all …]
/linux-6.15/rust/pin-init/examples/
H A Dmutex.rs11 pin::Pin,
89 pub fn lock(&self) -> Pin<CMutexGuard<'_, T>> { in lock()
105 Pin::new_unchecked(CMutexGuard { in lock()
113 pub fn get_data_mut(self: Pin<&mut Self>) -> &mut T { in get_data_mut()
181 let mtx: Pin<Arc<CMutex<usize>>> = Arc::pin_init(CMutex::new(0)).unwrap(); in main()
H A Dpthread_mutex.rs15 pin::Pin,
34 fn drop(self: Pin<&mut Self>) { in drop()
141 use core::pin::Pin; in main()
149 let mtx: Pin<Arc<PThreadMutex<usize>>> = Arc::try_pin_init(PThreadMutex::new(0)).unwrap(); in main()
/linux-6.15/rust/kernel/block/mq/
H A Dtag_set.rs7 use core::pin::Pin;
64 let tag_set = unsafe { Pin::get_unchecked_mut(tag_set) }; in new()
80 fn drop(self: Pin<&mut Self>) { in drop()
/linux-6.15/Documentation/input/devices/
H A Damijoy.rst13 Pin Meaning Pin Meaning
27 Pin Meaning
44 Pin Meaning
61 Pin Meaning
78 Pin Meaning
152 | Directions | Pin# | Counter bits |

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