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Searched refs:Phy (Results 1 – 25 of 66) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8550-gcc.yaml28 - description: PCIE 1 Phy Auxiliary clock source
29 - description: UFS Phy Rx symbol 0 clock source
30 - description: UFS Phy Rx symbol 1 clock source
31 - description: UFS Phy Tx symbol 0 clock source
32 - description: USB3 Phy wrapper pipe clock source
H A Dqcom,sm8650-gcc.yaml29 - description: PCIE 1 Phy Auxiliary clock source
30 - description: UFS Phy Rx symbol 0 clock source
31 - description: UFS Phy Rx symbol 1 clock source
32 - description: UFS Phy Tx symbol 0 clock source
33 - description: USB3 Phy wrapper pipe clock source
H A Dqcom,qcs8300-gcc.yaml29 - description: PCIE Phy Auxiliary clock source
31 - description: UFS Phy Rx symbol 0 clock source
32 - description: UFS Phy Rx symbol 1 clock source
33 - description: UFS Phy Tx symbol 0 clock source
34 - description: USB3 Phy wrapper pipe clock source
H A Dqcom,gcc-sm8450.yaml30 - description: PCIE 1 Phy Auxiliary clock source (Optional clock)
31 - description: UFS Phy Rx symbol 0 clock source (Optional clock)
32 - description: UFS Phy Rx symbol 1 clock source (Optional clock)
33 - description: UFS Phy Tx symbol 0 clock source (Optional clock)
34 - description: USB3 Phy wrapper pipe clock source (Optional clock)
H A Dqcom,sm4450-gcc.yaml27 - description: UFS Phy Rx symbol 0 clock source
28 - description: UFS Phy Rx symbol 1 clock source
29 - description: UFS Phy Tx symbol 0 clock source
30 - description: USB3 Phy wrapper pipe clock source
H A Dqcom,sm8750-gcc.yaml28 - description: UFS Phy Rx symbol 0 clock source
29 - description: UFS Phy Rx symbol 1 clock source
30 - description: UFS Phy Tx symbol 0 clock source
31 - description: USB3 Phy wrapper pipe clock source
H A Dqcom,x1e80100-gcc.yaml35 - description: USB QMP Phy 0 clock source
36 - description: USB QMP Phy 1 clock source
37 - description: USB QMP Phy 2 clock source
H A Dqcom,qdu1000-gcc.yaml28 - description: PCIE 0 Phy Auxiliary clock source
29 - description: USB3 Phy wrapper pipe clock source
/linux-6.15/Documentation/devicetree/bindings/scsi/
H A Dhisilicon-sas.txt23 - Phy interrupts
26 Phy interrupts : Each phy has 3 interrupt sources:
40 - Phy interrupts
43 Phy interrupts : Each controller has 2 phy interrupts:
/linux-6.15/Documentation/devicetree/bindings/reset/
H A Drenesas,rzg2l-usbphy-ctrl.yaml42 0 = Port 1 Phy reset
43 1 = Port 2 Phy reset
/linux-6.15/drivers/phy/samsung/
H A DKconfig3 # Phy drivers for Samsung platforms
104 Enable this to support SATA SerDes/Phy found on Samsung's
105 Exynos5250 based SoCs.This SerDes/Phy supports SATA 1.5 Gb/s,
/linux-6.15/drivers/phy/hisilicon/
H A DKconfig3 # Phy drivers for Hisilicon platforms
61 Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
/linux-6.15/drivers/phy/mscc/
H A DKconfig3 # Phy drivers for Microsemi devices
/linux-6.15/drivers/phy/ingenic/
H A DKconfig3 # Phy drivers for Ingenic platforms
/linux-6.15/drivers/phy/microchip/
H A DKconfig3 # Phy drivers for Microchip devices
/linux-6.15/drivers/phy/lantiq/
H A DKconfig3 # Phy drivers for Lantiq / Intel platforms
/linux-6.15/drivers/phy/motorola/
H A DKconfig3 # Phy drivers for Motorola devices
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dcortina.txt1 Cortina Phy Driver Device Tree Bindings
H A Dcpsw-phy-sel.txt1 TI CPSW Phy mode Selection Device Tree Bindings (DEPRECATED)
/linux-6.15/drivers/phy/realtek/
H A DKconfig3 # Phy drivers for Realtek platforms
/linux-6.15/Documentation/devicetree/bindings/soc/hisilicon/
H A Dhisilicon,hi3660-usb3-otg-bc.yaml24 description: USB Phy node
/linux-6.15/drivers/phy/cadence/
H A DKconfig3 # Phy drivers for Cadence PHYs
/linux-6.15/drivers/phy/intel/
H A DKconfig3 # Phy drivers for Intel platforms
/linux-6.15/drivers/phy/renesas/
H A DKconfig3 # Phy drivers for Renesas platforms
/linux-6.15/drivers/phy/starfive/
H A DKconfig3 # Phy drivers for StarFive platforms

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