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Searched refs:PcieLaneCount (Results 1 – 25 of 30) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu9_driver_if.h238 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; /* 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 */ member
H A Dsmu7_discrete.h212 uint8_t PcieLaneCount; member
H A Dsmu71_discrete.h154 uint8_t PcieLaneCount; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu72_discrete.h145 uint8_t PcieLaneCount; /*< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 */ member
H A Dsmu73_discrete.h126 uint8_t PcieLaneCount; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu74_discrete.h158 uint8_t PcieLaneCount; member
H A Dsmu11_driver_if.h454 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; member
H A Dsmu75_discrete.h168 uint8_t PcieLaneCount; member
/linux-6.15/drivers/gpu/drm/radeon/
H A Dsmu7_discrete.h205 uint8_t PcieLaneCount; member
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c533 pcie_width_arg = (pp_table->PcieLaneCount[i] > pcie_width) ? pcie_width : in vega12_override_pcie_parameters()
534 pp_table->PcieLaneCount[i]; in vega12_override_pcie_parameters()
537 pp_table->PcieLaneCount[i]) { in vega12_override_pcie_parameters()
549 pp_table->PcieLaneCount[i] = pcie_width_arg; in vega12_override_pcie_parameters()
564 pp_table->PcieLaneCount[i] = pcie_width; in vega12_override_pcie_parameters()
H A Dvega20_hwmgr.c879 pcie_width_arg = (pp_table->PcieLaneCount[i] > pcie_width) ? pcie_width : in vega20_override_pcie_parameters()
880 pp_table->PcieLaneCount[i]; in vega20_override_pcie_parameters()
883 pp_table->PcieLaneCount[i]) { in vega20_override_pcie_parameters()
895 pp_table->PcieLaneCount[i] = pcie_width_arg; in vega20_override_pcie_parameters()
910 pp_table->PcieLaneCount[i] = pcie_width; in vega20_override_pcie_parameters()
3474 lane_width = pptable->PcieLaneCount[i]; in vega20_print_clock_levels()
H A Dvega10_hwmgr.c1552 if (pp_table->PcieLaneCount[i] > pcie_width) in vega10_override_pcie_parameters()
1553 pp_table->PcieLaneCount[i] = pcie_width; in vega10_override_pcie_parameters()
1559 pp_table->PcieLaneCount[i] = pcie_width; in vega10_override_pcie_parameters()
1577 pp_table->PcieLaneCount[i] = pcie_table->pcie_lane[i]; in vega10_populate_smc_link_levels()
1590 pp_table->PcieLaneCount[i] = pcie_table->pcie_lane[j]; in vega10_populate_smc_link_levels()
4765 lane_width = pptable->PcieLaneCount[i]; in vega10_emit_clock_levels()
4909 lane_width = pptable->PcieLaneCount[i]; in vega10_print_clock_levels()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/
H A Dsmu9_driver_if.h342 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; member
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_sienna_cichlid.h757 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
1117 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu11_driver_if_navi10.h627 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu13_driver_if_v13_0_7.h1139 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu13_driver_if_v13_0_0.h1137 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
H A Dsmu14_driver_if_v14_0.h1232 uint8_t PcieLaneCount[NUM_LINK_LEVELS]; ///< 1=x1, 2=x2, 3=x4, 4=x8, 5=x12, 6=x16 member
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c2452 dpm_context->dpm_tables.pcie_table.pcie_lane[i] = pptable->PcieLaneCount[i]; in navi10_update_pcie_parameters()
2458 (pcie_gen_cap << 8)) | ((pptable->PcieLaneCount[i] <= pcie_width_cap) ? in navi10_update_pcie_parameters()
2459 pptable->PcieLaneCount[i] : pcie_width_cap); in navi10_update_pcie_parameters()
2470 if (pptable->PcieLaneCount[i] > pcie_width_cap) in navi10_update_pcie_parameters()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c695 !skutable->PcieLaneCount[link_level] && in smu_v13_0_7_set_default_dpm_table()
702 skutable->PcieLaneCount[link_level]; in smu_v13_0_7_set_default_dpm_table()
H A Dsmu_v13_0_0_ppt.c697 !skutable->PcieLaneCount[link_level] && in smu_v13_0_0_set_default_dpm_table()
704 skutable->PcieLaneCount[link_level]; in smu_v13_0_0_set_default_dpm_table()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c627 !skutable->PcieLaneCount[link_level] && in smu_v14_0_2_set_default_dpm_table()
634 skutable->PcieLaneCount[link_level]; in smu_v14_0_2_set_default_dpm_table()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c582 table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width( in vegam_populate_smc_link_level()
H A Dfiji_smumgr.c839 table->LinkLevel[i].PcieLaneCount = (uint8_t)encode_pcie_lane_width( in fiji_populate_smc_link_level()
H A Diceland_smumgr.c775 table->LinkLevel[i].PcieLaneCount = in iceland_populate_smc_link_level()

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