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Searched refs:PUPD (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt6795-pinctrl.yaml101 description: mt6795 pull down PUPD/R0/R1 type define value.
104 values; When pull down type is PUPD/R0/R1, adding R1R0 defines
111 description: mt6795 pull up PUPD/R0/R1 type define value.
114 values; When pull up type is PUPD/R0/R1, adding R1R0 defines will
H A Dmediatek,mt8186-pinctrl.yaml116 description: mt8186 pull down PUPD/R0/R1 type define value.
124 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
161 description: mt8186 pull up PUPD/R0/R1 type define value.
169 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
H A Dmediatek,mt8188-pinctrl.yaml104 description: mt8188 pull down PUPD/R0/R1 type define value.
112 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
130 description: mt8188 pull up PUPD/R0/R1 type define value.
138 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set
H A Dmediatek,mt8195-pinctrl.yaml109 description: mt8195 pull down PUPD/R0/R1 type define value.
117 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
157 description: mt8195 pull up PUPD/R0/R1 type define value.
165 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
H A Dmediatek,mt8192-pinctrl.yaml92 description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
103 description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
H A Dmediatek,mt7981-pinctrl.yaml357 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
366 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
H A Dmediatek,mt7986-pinctrl.yaml303 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
312 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
H A Dmediatek,mt7988-pinctrl.yaml415 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
424 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
/linux-6.15/drivers/pinctrl/renesas/
H A Dpinctrl-rzv2m.c90 #define PUPD(n) (0x24 + (n) * 0x40) macro
495 switch ((readl(pctrl->base + PUPD(port)) >> bit) & PUPD_MASK) { in rzv2m_pinctrl_pinconf_get()
610 rzv2m_rmw_pin_config(pctrl, PUPD(port), bit, PUPD_MASK, val); in rzv2m_pinctrl_pinconf_set()
H A Dpinctrl-rzg2l.c142 #define PUPD(off) (0x1C00 + (off) * 8) macro
1333 arg = rzg2l_read_pin_config(pctrl, PUPD(off), bit, PUPD_MASK); in rzg2l_pinctrl_pinconf_get()
1497 rzg2l_rmw_pin_config(pctrl, PUPD(off), bit, PUPD_MASK, ret); in rzg2l_pinctrl_pinconf_set()
2997 RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off), in rzg2l_pinctrl_pm_setup_regs()
3000 RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off), in rzg2l_pinctrl_pm_setup_regs()