Searched refs:PSR_MODE_MASK (Results 1 – 14 of 14) sorted by relevance
203 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)206 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \210 ((regs)->pstate & PSR_MODE_MASK)
173 switch (ctxt->regs.pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) { in vcpu_is_el2_ctxt()268 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; in vcpu_mode_priv()
32 switch(*vcpu_cpsr(vcpu) & PSR_MODE_MASK) { in pend_sync_exception()76 if (is_aarch32 || (cpsr & PSR_MODE_MASK) == PSR_MODE_EL0t) in inject_abt64()
351 __entry->target_mode = spsr_el2 & (PSR_MODE_MASK | PSR_MODE32_BIT);381 __entry->source_mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
452 u64 mode = spsr & PSR_MODE_MASK; in nvhe_hyp_panic_handler()
2439 u64 mode = spsr & PSR_MODE_MASK; in kvm_check_illegal_exception_return()2463 PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_check_illegal_exception_return()2567 mode = pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_inject_nested()
393 mode = spsr & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_hyp_handle_eret()418 spsr = (spsr & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in kvm_hyp_handle_eret()574 u64 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()585 *vcpu_cpsr(vcpu) &= ~(PSR_MODE_MASK | PSR_MODE32_BIT); in fixup_guest_exit()
15 uc->uc_mcontext.pstate &= ~PSR_MODE_MASK; \
25 #define PSR_MODE_MASK 0x0000000f macro140 switch (regs->psr & PSR_MODE_MASK) { in apple_rtkit_crashlog_dump_regs()
260 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in to_hw_pstate()271 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in to_hw_pstate()
244 mode = regs->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK); in do_sdei_event()
152 and x0, x0, #~PSR_MODE_MASK
39 #define PSR_MODE_MASK 0x0000000f macro
97 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in enter_exception64()