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Searched refs:PLL_LOCK (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/phy/broadcom/
H A Dphy-bcm-sr-usb.c46 PLL_LOCK, enumerator
53 [PLL_LOCK] = 3,
61 [PLL_LOCK] = 6,
150 BIT(u3pll_ctrl[PLL_LOCK])); in bcm_usb_ss_phy_init()
169 BIT(u2pll_ctrl[PLL_LOCK])); in bcm_usb_hs_phy_init()
/linux-6.15/drivers/clk/axs10x/
H A Dpll_clock.c62 #define PLL_LOCK BIT(0) macro
194 if (!(ioread32(clk->lock) & PLL_LOCK)) in axs10x_pll_set_rate()
/linux-6.15/drivers/pmdomain/imx/
H A Dimx8mp-blk-ctrl.c27 #define PLL_LOCK BIT(13) macro
117 val & PLL_LOCK, 10, 100); in clk_hsio_pll_prepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
/linux-6.15/drivers/phy/ti/
H A Dphy-ti-pipe3.c45 #define PLL_LOCK 0x2 macro
396 if (val & PLL_LOCK) in ti_pipe3_dpll_wait_lock()
531 if ((val & PLL_LOCK) && phy->mode == PIPE3_MODE_SATA) in ti_pipe3_init()
/linux-6.15/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.h331 #define PLL_LOCK (0x1 << 4) macro
H A Danalogix_dp_reg.c225 val & PLL_LOCK, 120, in analogix_dp_wait_pll_locked()
/linux-6.15/drivers/phy/rockchip/
H A Dphy-rockchip-samsung-dcphy.c159 #define PLL_LOCK BIT(0) macro
1097 sts, (sts & PLL_LOCK), 1000, 20000); in samsung_mipi_dcphy_pll_enable()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_snps_phy.c1864 if (intel_de_wait_for_set(display, enable_reg, PLL_LOCK, 5)) in intel_mpllb_enable()
1904 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 5)) in intel_mpllb_disable()
H A Dintel_dpll_mgr.c3931 if (intel_de_wait_for_set(display, enable_reg, PLL_LOCK, 1)) in icl_pll_enable()
4044 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 1)) in icl_pll_disable()
/linux-6.15/drivers/gpu/drm/omapdrm/dss/
H A Ddsi.c243 PIS(PLL_LOCK), in print_irq_status()
1070 PIS(PLL_LOCK); in dsi_dump_dsi_irqs()
/linux-6.15/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddsi.c620 PIS(PLL_LOCK), in print_irq_status()
1570 PIS(PLL_LOCK); in dsi_dump_dsidev_irqs()
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_reg.h3956 #define PLL_LOCK REG_BIT(30) macro