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Searched refs:PLANE_PRIMARY (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dreg.h68 (((p) == PIPE_A) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50080)) : \
70 (((p) == PIPE_B) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x50088)) : \
72 (((p) == PIPE_C) ? (((q) == PLANE_PRIMARY) ? (_MMIO(0x5008C)) : \
86 (PLANE_PRIMARY) : \
H A Dhandlers.c1025 int event = SKL_FLIP_EVENT(pipe, PLANE_PRIMARY); in pri_surf_mmio_write()
1071 if (plane == PLANE_PRIMARY) { in reg50080_mmio_write()
2297 MMIO_DH(REG_50080(PIPE_A, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
2300 MMIO_DH(REG_50080(PIPE_B, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
2303 MMIO_DH(REG_50080(PIPE_C, PLANE_PRIMARY), D_ALL, NULL, in init_generic_mmio_info()
H A Dcmd_parser.c1441 if (info->plane == PLANE_PRIMARY) in gen8_update_plane_mmio_from_mi_display_flip()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c938 case PLANE_PRIMARY: in g4x_plane_fifo_size()
987 if (plane->id == PLANE_PRIMARY && in g4x_compute_wm()
997 } else if (plane->id == PLANE_PRIMARY && in g4x_compute_wm()
1067 if (plane_id == PLANE_PRIMARY) in g4x_raw_plane_wm_compute()
1085 if (plane_id != PLANE_PRIMARY || in g4x_raw_plane_wm_compute()
1107 if (plane_id == PLANE_PRIMARY) in g4x_raw_plane_wm_compute()
1119 if (plane_id == PLANE_PRIMARY) in g4x_raw_plane_wm_compute()
1573 total_rate = raw->plane[PLANE_PRIMARY] + in vlv_compute_fifo()
2211 if (plane->id == PLANE_PRIMARY && in intel_crtc_for_plane()
3695 wm->ddl[pipe].plane[PLANE_PRIMARY] = in vlv_read_wm_values()
[all …]
H A Dintel_sprite_uapi.c29 if (plane->id == PLANE_PRIMARY && in intel_plane_set_ckey()
37 if (DISPLAY_VER(dev_priv) >= 9 && plane->id != PLANE_PRIMARY && in intel_plane_set_ckey()
H A Dintel_display_limits.h87 PLANE_PRIMARY = PLANE_1, enumerator
H A Dintel_display_irq.c745 { .fault = ERR_INT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
748 { .fault = ERR_INT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
751 { .fault = ERR_INT_PRIMARY_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
866 { .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
867 { .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
1178 { .fault = GEN8_PIPE_PRIMARY_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
1813 { .fault = PLANEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
1817 { .fault = PLANEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
1821 { .fault = PLANEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
H A Dintel_display_trace.h288 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
337 __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
H A Dintel_display.h98 for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
H A Di9xx_plane.c928 plane->id = PLANE_PRIMARY; in intel_primary_plane_create()
H A Dintel_atomic_plane.c494 if (plane->id == PLANE_PRIMARY) { in i9xx_must_disable_cxsr()
H A Dintel_color.c2122 (DISPLAY_VER(display) < 9 && plane->id == PLANE_PRIMARY); in need_plane_update()
/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c179 MMIO_D(REG_50080(PIPE_A, PLANE_PRIMARY)); in iterate_generic_mmio()
188 MMIO_D(REG_50080(PIPE_B, PLANE_PRIMARY)); in iterate_generic_mmio()
197 MMIO_D(REG_50080(PIPE_C, PLANE_PRIMARY)); in iterate_generic_mmio()