Searched refs:PIPE_FIFO_UNDERRUN_STATUS (Results 1 – 3 of 3) sorted by relevance
103 if ((intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0) in i9xx_check_fifo_underruns()107 intel_de_write(display, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_check_fifo_underruns()127 enable_mask | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_set_fifo_underrun_reporting()130 if (old && intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) in i9xx_set_fifo_underrun_reporting()
303 enable_mask &= ~(PIPE_FIFO_UNDERRUN_STATUS | in i915_pipestat_enable_mask()521 PIPESTAT_INT_STATUS_MASK | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_pipestat_irq_reset()554 status_mask = PIPE_FIFO_UNDERRUN_STATUS; in i9xx_pipestat_irq_ack()612 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i915_pipestat_irq_handler()637 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i965_pipestat_irq_handler()664 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in valleyview_pipestat_irq_handler()
1594 #define PIPE_FIFO_UNDERRUN_STATUS (1UL << 31) macro