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Searched refs:PHY_INTERFACE_MODE_5GBASER (Results 1 – 19 of 19) sorted by relevance

/linux-6.15/drivers/phy/mediatek/
H A Dphy-mtk-xfi-tphy.c102 is_5g = interface == PHY_INTERFACE_MODE_5GBASER; in mtk_xfi_tphy_setup()
299 case PHY_INTERFACE_MODE_5GBASER: in mtk_xfi_tphy_set_mode()
/linux-6.15/drivers/net/phy/
H A Dmarvell10g.c798 __set_bit(PHY_INTERFACE_MODE_5GBASER, possible); in mv3310_fill_possible_interfaces()
990 phydev->interface = PHY_INTERFACE_MODE_5GBASER; in mv3310_update_interface()
1161 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv3310_init_supported_interfaces()
1172 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv3340_init_supported_interfaces()
1182 __set_bit(PHY_INTERFACE_MODE_5GBASER, mask); in mv2110_init_supported_interfaces()
H A Dphy_caps.c328 case PHY_INTERFACE_MODE_5GBASER: in phy_caps_from_interface()
H A Dsfp-bus.c291 __set_bit(PHY_INTERFACE_MODE_5GBASER, interfaces); in sfp_parse_support()
374 return PHY_INTERFACE_MODE_5GBASER; in sfp_select_interface()
H A Dphy-core.c137 case PHY_INTERFACE_MODE_5GBASER: in phy_interface_num_ports()
H A Dphylink.c140 PHY_INTERFACE_MODE_5GBASER,
216 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ in phylink_interface_signal_rate()
267 case PHY_INTERFACE_MODE_5GBASER: in phylink_interface_max_speed()
801 case PHY_INTERFACE_MODE_5GBASER: in phylink_parse_mode()
/linux-6.15/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_phylink.c41 case PHY_INTERFACE_MODE_5GBASER: in sparx5_phylink_mac_select_pcs()
H A Dsparx5_port.c148 if (port->conf.portmode == PHY_INTERFACE_MODE_5GBASER) in sparx5_get_sfi_status()
176 case PHY_INTERFACE_MODE_5GBASER: in sparx5_get_port_status()
252 case PHY_INTERFACE_MODE_5GBASER: in sparx5_port_verify_speed()
806 u32 clk_spd = conf->portmode == PHY_INTERFACE_MODE_5GBASER ? 1 : 0; in sparx5_port_pcs_high_set()
H A Dsparx5_main.h733 return interface == PHY_INTERFACE_MODE_5GBASER || in sparx5_is_baser()
H A Dsparx5_main.c377 __set_bit(PHY_INTERFACE_MODE_5GBASER, in sparx5_create_port()
/linux-6.15/drivers/phy/marvell/
H A Dphy-mvebu-cp110-comphy.c225 ETH_CONF(2, 0, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),
240 ETH_CONF(4, 0, PHY_INTERFACE_MODE_5GBASER, 0x2, COMPHY_FW_MODE_XFI),
248 ETH_CONF(4, 1, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI),
798 case PHY_INTERFACE_MODE_5GBASER: in mvebu_comphy_power_on()
/linux-6.15/drivers/net/dsa/mv88e6xxx/
H A Dpcs-639x.c420 case PHY_INTERFACE_MODE_5GBASER: in mv88e639x_xg_pcs_get_state()
464 case PHY_INTERFACE_MODE_5GBASER: in mv88e639x_pcs_select()
H A Dport.c557 case PHY_INTERFACE_MODE_5GBASER: in mv88e6xxx_port_set_cmode()
H A Dchip.c829 __set_bit(PHY_INTERFACE_MODE_5GBASER, supported); in mv88e6393x_phylink_get_caps()
/linux-6.15/include/linux/
H A Dphy.h135 PHY_INTERFACE_MODE_5GBASER, enumerator
243 case PHY_INTERFACE_MODE_5GBASER: in phy_modes()
/linux-6.15/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c1516 interface == PHY_INTERFACE_MODE_5GBASER || in mvpp2_is_xlg()
1668 case PHY_INTERFACE_MODE_5GBASER: in mvpp22_gop_init()
2215 case PHY_INTERFACE_MODE_5GBASER: in mvpp22_pcs_reset_deassert()
6225 if (port->phy_interface == PHY_INTERFACE_MODE_5GBASER) in mvpp2_xlg_pcs_get_state()
7056 __set_bit(PHY_INTERFACE_MODE_5GBASER, in mvpp2_port_probe()
7062 } else if (phy_mode == PHY_INTERFACE_MODE_5GBASER) { in mvpp2_port_probe()
7063 __set_bit(PHY_INTERFACE_MODE_5GBASER, in mvpp2_port_probe()
7076 else if (phy_mode == PHY_INTERFACE_MODE_5GBASER) in mvpp2_port_probe()
/linux-6.15/drivers/net/phy/aquantia/
H A Daquantia_main.c1021 interface = PHY_INTERFACE_MODE_5GBASER; in aqr107_fill_interface_modes()
/linux-6.15/Documentation/networking/
H A Dphy.rst275 ``PHY_INTERFACE_MODE_5GBASER``
/linux-6.15/drivers/net/ethernet/renesas/
H A Drswitch.c1143 case PHY_INTERFACE_MODE_5GBASER: in rswitch_rmac_setting()