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Searched refs:PCLK_PWM0 (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Drk3308-cru.h185 #define PCLK_PWM0 206 macro
H A Drk3368-cru.h134 #define PCLK_PWM0 350 macro
H A Dpx30-cru.h162 #define PCLK_PWM0 339 macro
H A Drockchip,rk3528-cru.h122 #define PCLK_PWM0 110 macro
H A Drockchip,rv1126-cru.h48 #define PCLK_PWM0 35 macro
H A Drk3568-cru.h61 #define PCLK_PWM0 48 macro
/linux-6.15/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi276 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
287 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
298 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
309 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
/linux-6.15/arch/arm64/boot/dts/rockchip/
H A Drk3308.dtsi503 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
514 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
525 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
536 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
H A Drk356x-base.dtsi433 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
444 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
455 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
466 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
H A Dpx30.dtsi669 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
680 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
691 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
702 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rk3368.c704 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(12), 0, GFLAGS),
H A Dclk-px30.c856 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 15, GFLAGS),
H A Dclk-rk3308.c874 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 3, GFLAGS),
H A Dclk-rv1126.c318 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0,
H A Dclk-rk3528.c474 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_bus_root", 0,
H A Dclk-rk3568.c1515 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0,