Searched refs:PCLK_HDPTX0 (Results 1 – 4 of 4) sorted by relevance
110 clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
611 #define PCLK_HDPTX0 596 macro
2078 GATE(PCLK_HDPTX0, "pclk_hdptx0", "pclk_top_root", 0,
2902 clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;