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Searched refs:PCLK_CSIPHY0 (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Drockchip,rk3562-cru.h366 #define PCLK_CSIPHY0 354 macro
H A Drockchip,rv1126-cru.h350 #define PCLK_CSIPHY0 290 macro
H A Drockchip,rk3588-cru.h269 #define PCLK_CSIPHY0 254 macro
/linux-6.15/drivers/clk/rockchip/
H A Dclk-rv1126.c894 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_pdtop", 0,
H A Dclk-rk3562.c1000 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_vi", 0,
H A Dclk-rk3588.c788 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_top_root", 0,