Searched refs:PCIE_CORE_CTRL (Results 1 – 3 of 3) sorted by relevance
542 ret = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_ep_link_training()559 val = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL); in rockchip_pcie_ep_link_training()563 readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_ep_link_training()
96 #define PCIE_CORE_CTRL (PCIE_CORE_CTRL_MGMT_BASE + 0x000) macro
348 err = readl_poll_timeout(rockchip->apb_base + PCIE_CORE_CTRL, in rockchip_pcie_host_init_port()356 status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL); in rockchip_pcie_host_init_port()