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Searched refs:PCH_DREF_CONTROL (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_pch_refclk.c557 val = intel_de_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
617 intel_de_write(display, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
618 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
636 intel_de_write(display, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
637 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
647 intel_de_write(display, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
648 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
661 intel_de_write(display, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
662 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
H A Dintel_dpll_mgr.c554 val = intel_de_read(display, PCH_DREF_CONTROL); in ibx_assert_pch_refclk_enabled()
H A Dintel_display.c2563 PCH_DREF_CONTROL) & in intel_panel_sanitize_ssc()
/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c397 MMIO_D(PCH_DREF_CONTROL); in iterate_generic_mmio()
H A Di915_reg.h2820 #define PCH_DREF_CONTROL _MMIO(0xC6200) macro