Home
last modified time | relevance | path

Searched refs:PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5701 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h5640 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h6428 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6962 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT 0x0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15505 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_9_1_sh_mask.h16810 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h16682 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h18983 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h8931 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h16568 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h20599 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h28272 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h23003 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h22929 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h21111 #define PA_CL_UCP_3_Z__DATA_REGISTER__SHIFT … macro