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Searched refs:PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5663 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h5666 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h6454 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6988 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT 0x0 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16773 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_9_1_sh_mask.h18078 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17953 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h20081 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h10200 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h17944 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h21970 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h30183 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h24259 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h24300 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h22450 #define PA_CL_POINT_CULL_RAD__DATA_REGISTER__SHIFT … macro