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Searched refs:OTP (Results 1 – 25 of 49) sorted by relevance

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/linux-6.15/drivers/nvmem/
H A DKconfig44 tristate "Broadcom On-Chip OTP Controller support"
76 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
88 tristate "i.MX On-Chip OTP Controller support"
97 tristate "i.MX8 SCU On-Chip OTP Controller support"
117 tristate "Microchip LAN9662 OTP controller support"
148 tristate "NXP LPC18XX OTP Memory Support"
196 tristate "Freescale MXS On-Chip OTP Memory Support"
208 tristate "Nintendo Wii and Wii U OTP Support"
282 tristate "Rockchip OTP controller support"
287 from OTP, such as cpu-leakage.
[all …]
/linux-6.15/Documentation/devicetree/bindings/nvmem/
H A Dnintendo-otp.yaml7 title: Nintendo Wii and Wii U OTP
10 This binding represents the OTP memory as found on a Nintendo Wii or Wii U,
14 See https://wiiubrew.org/wiki/Hardware/OTP
H A Dvf610-ocotp.txt1 On-Chip OTP Memory for Freescale Vybrid
8 reg : Address and length of OTP controller and fuse map registers
H A Dlpc1850-otp.txt1 * NXP LPC18xx OTP memory
3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
H A Dbrcm,ocotp.txt1 Broadcom OTP memory controller
8 - reg: Base address of the OTP controller.
H A Dmicrochip,lan9662-otpc.yaml7 title: Microchip LAN9662 OTP Controller (OTPC)
13 OTP controller drives a NVMEM memory where system specific data
H A Dmicrochip,sama7g5-otpc.yaml7 title: Microchip SAMA7G5 OTP Controller (OTPC)
13 OTP controller drives a NVMEM memory where system specific data
H A Dimx-ocotp.yaml7 title: Freescale i.MX On-Chip OTP Controller (OCOTP)
15 This binding represents the on-chip eFuse OTP controller found on
H A Dmxs-ocotp.yaml7 title: On-Chip OTP Memory for Freescale i.MX23/i.MX28
H A Dsunplus,sp7021-ocotp.yaml8 title: On-Chip OTP Memory for Sunplus SP7021
/linux-6.15/drivers/mtd/nand/onenand/
H A DKconfig45 bool "OneNAND OTP Support"
49 Also, 1st Block of NAND Flash Array can be used as OTP.
51 The OTP block can be read, programmed and locked using the same
53 OTP block cannot be erased.
55 OTP block is fully-guaranteed to be a valid block.
/linux-6.15/Documentation/devicetree/bindings/regulator/
H A Dpalmas-pmic.txt3 The tps659038 for the AM57x class have OTP spins that
5 is not a need to add the OTP spins to the palmas driver. The
35 For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
50 ti,smps-range - OTP has the wrong range set for the hardware so override
/linux-6.15/drivers/misc/mchp_pci1xxxx/
H A DKconfig2 tristate "Microchip PCI1XXXX PCIe to GPIO Expander + OTP/EEPROM manager"
11 which also has registers to interface with the OTP and EEPROM.
/linux-6.15/Documentation/devicetree/bindings/net/
H A Dmicrochip,lan78xx.txt3 The LAN78XX devices are usually configured by programming their OTP or with
5 The Device Tree properties, if present, override the OTP and EEPROM.
/linux-6.15/Documentation/devicetree/bindings/watchdog/
H A Ddlg,da9062-watchdog.yaml39 default chip's OTP setting for WATCHDOG_SD bit. If this property is NOT
41 chip's OTP settings.
/linux-6.15/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml46 # power outputs go down and OTP is reload. At the SNVS state all other logic
49 # state. When a reset is done via SNVS state the PMIC OTP data is not reload.
52 # power outputs will be returned to HW control by OTP loading. Thus the reset
69 # bootloader or OTP) is not touched.
H A Drohm,bd71837-pmic.yaml46 # down and OTP is reload. At the SNVS state all other logic and external
49 # reset is done via SNVS state the PMIC OTP data is not reload. This causes
52 # outputs will be returned to HW control by OTP loading. Thus the reset
69 # bootloader or OTP) is not touched.
H A Dpalmas.txt31 hardware, if not set will use muxing in OTP.
/linux-6.15/Documentation/hwmon/
H A Dsht15.rst48 The humidity calibration coefficients are programmed into an OTP memory on the
67 flag to indicate not to reload from OTP (default to false).
/linux-6.15/Documentation/ABI/testing/
H A Ddebugfs-turris-mox-rwtm9 device's OTP. The message must be exactly 64 bytes
H A Dsysfs-platform-silicom27 OTP status:
/linux-6.15/drivers/mtd/chips/
H A DKconfig156 bool "Protection Registers aka one-time programmable (OTP) bits"
166 programmable (OTP) bits; when programmed, register bits cannot be
173 because the Lock Register bits themselves are OTP, when programmed,
178 in the programming of OTP bits will waste them.
/linux-6.15/Documentation/devicetree/bindings/hwinfo/
H A Dsamsung,exynos-chipid.yaml42 is missing in the CHIPID registers or in the OTP memory.
/linux-6.15/Documentation/devicetree/bindings/input/
H A Dti,palmas-pwrbutton.txt18 NOTE: This depends on OTP support and POWERHOLD signal configuration
/linux-6.15/Documentation/w1/slaves/
H A Dw1_ds2406.rst15 These chips also provide 128 bytes of OTP EPROM, but reading/writing it is

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