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Searched refs:OTG (Results 1 – 25 of 150) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.h174 SRII(PIXEL_RATE_CNTL, OTG, 0), \
175 SRII(PIXEL_RATE_CNTL, OTG, 1),\
176 SRII(PIXEL_RATE_CNTL, OTG, 2),\
177 SRII(PIXEL_RATE_CNTL, OTG, 3),\
228 SRI_ARR(OTG_H_TOTAL, OTG, inst),\
230 SRI_ARR(OTG_H_SYNC_A, OTG, inst),\
233 SRI_ARR(OTG_V_TOTAL, OTG, inst),\
235 SRI_ARR(OTG_V_SYNC_A, OTG, inst),\
237 SRI_ARR(OTG_CONTROL, OTG, inst),\
250 SRI_ARR(OTG_STATUS, OTG, inst),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn314/
H A Ddcn314_optc.h35 SRI(OTG_VREADY_PARAM, OTG, inst),\
42 SRI(OTG_H_TOTAL, OTG, inst),\
44 SRI(OTG_H_SYNC_A, OTG, inst),\
47 SRI(OTG_V_TOTAL, OTG, inst),\
49 SRI(OTG_V_SYNC_A, OTG, inst),\
51 SRI(OTG_CONTROL, OTG, inst),\
55 SRI(OTG_V_TOTAL_MAX, OTG, inst),\
58 SRI(OTG_TRIGA_CNTL, OTG, inst),\
62 SRI(OTG_STATUS, OTG, inst),\
80 SRI(OTG_CRC_CNTL, OTG, inst),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn31/
H A Ddcn31_optc.h34 SRI(OTG_VREADY_PARAM, OTG, inst),\
41 SRI(OTG_H_TOTAL, OTG, inst),\
43 SRI(OTG_H_SYNC_A, OTG, inst),\
46 SRI(OTG_V_TOTAL, OTG, inst),\
48 SRI(OTG_V_SYNC_A, OTG, inst),\
50 SRI(OTG_CONTROL, OTG, inst),\
57 SRI(OTG_TRIGA_CNTL, OTG, inst),\
61 SRI(OTG_STATUS, OTG, inst),\
79 SRI(OTG_CRC_CNTL, OTG, inst),\
100 SRI(OTG_CRC_CNTL2, OTG, inst),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn30/
H A Ddcn30_optc.h43 SRI(OTG_H_TOTAL, OTG, inst),\
45 SRI(OTG_H_SYNC_A, OTG, inst),\
48 SRI(OTG_V_TOTAL, OTG, inst),\
50 SRI(OTG_V_SYNC_A, OTG, inst),\
52 SRI(OTG_CONTROL, OTG, inst),\
60 SRI(OTG_TRIGA_CNTL, OTG, inst),\
64 SRI(OTG_STATUS, OTG, inst),\
84 SRI(OTG_CRC_CNTL, OTG, inst),\
85 SRI(OTG_CRC_CNTL2, OTG, inst),\
94 SRI(OTG_DRR_CONTROL, OTG, inst)
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.h72 SRII(PIXEL_RATE_CNTL, OTG, 0),\
73 SRII(PIXEL_RATE_CNTL, OTG, 1),\
74 SRII(PIXEL_RATE_CNTL, OTG, 2),\
77 SRII(PIXEL_RATE_CNTL, OTG, 5)
86 SRII(PIXEL_RATE_CNTL, OTG, 1)
101 SRII(PIXEL_RATE_CNTL, OTG, 3)
116 SRII(PIXEL_RATE_CNTL, OTG, 3)
131 SRII(PIXEL_RATE_CNTL, OTG, 3)
149 SRII(PIXEL_RATE_CNTL, OTG, 4)
158 SRII(PIXEL_RATE_CNTL, OTG, 1)
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.h47 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
48 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
49 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
50 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
125 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 0, mask_sh),\
126 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 1, mask_sh),\
127 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, DIV, 2, mask_sh),\
129 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
130 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
131 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.h37 SRI(OTG_VREADY_PARAM, OTG, inst),\
42 SRI(OTG_H_TOTAL, OTG, inst),\
44 SRI(OTG_H_SYNC_A, OTG, inst),\
47 SRI(OTG_V_TOTAL, OTG, inst),\
49 SRI(OTG_V_SYNC_A, OTG, inst),\
52 SRI(OTG_CONTROL, OTG, inst),\
56 SRI(OTG_V_TOTAL_MAX, OTG, inst),\
57 SRI(OTG_V_TOTAL_MID, OTG, inst),\
60 SRI(OTG_TRIGA_CNTL, OTG, inst),\
64 SRI(OTG_STATUS, OTG, inst),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
H A Ddcn32_dccg.h80 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 0, mask_sh),\
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 1, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DTBCLK_DTO, ENABLE, 2, mask_sh),\
88 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
89 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
90 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
91 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 3, mask_sh),\
92 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
93 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
94 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.h81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
95 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
96 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 3, mask_sh),\
97 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 4, mask_sh),\
98 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 5, mask_sh),\
102 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 5, mask_sh)
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn303/
H A Ddcn303_dccg.h38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
39 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1)
59 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
60 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
61 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
62 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh)
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.h52 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
53 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
54 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
55 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
119 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
120 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
121 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
123 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
124 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
125 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.h110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
111 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
112 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
114 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
115 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
116 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
117 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 3, mask_sh),\
127 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 0, mask_sh),\
128 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 1, mask_sh),\
129 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, DROP_PIXEL, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h479 SRI_ARR(OTG_VUPDATE_PARAM, OTG, inst), \
480 SRI_ARR(OTG_VREADY_PARAM, OTG, inst), \
489 SRI_ARR(OTG_H_SYNC_A, OTG, inst), SRI_ARR(OTG_H_SYNC_A_CNTL, OTG, inst), \
490 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst), SRI_ARR(OTG_V_TOTAL, OTG, inst), \
492 SRI_ARR(OTG_V_SYNC_A, OTG, inst), SRI_ARR(OTG_V_SYNC_A_CNTL, OTG, inst), \
493 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \
503 SRI_ARR(OTG_STATUS, OTG, inst), SRI_ARR(OTG_STATUS_POSITION, OTG, inst), \
518 SRI_ARR(OTG_GSL_CONTROL, OTG, inst), SRI_ARR(OTG_CRC_CNTL, OTG, inst), \
542 SRI_ARR(INTERRUPT_DEST, OTG, inst)
629 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1), \
[all …]
/linux-6.15/Documentation/devicetree/bindings/usb/
H A Dusb-drd.yaml7 title: Generic USB OTG Controller
15 Tells usb driver the release number of the OTG and EH supplement with
17 decimal (i.e. 2.0 is 0200H). This property is used if any real OTG
27 should default to OTG.
34 Tells OTG controllers we want to disable OTG HNP. Normally HNP is the
35 basic function of real OTG except you want it to be a srp-capable only B
41 Tells OTG controllers we want to disable OTG SRP. SRP is optional for OTG
47 Tells OTG controllers we want to disable OTG ADP. ADP is optional for OTG
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.h35 SRII(PIXEL_RATE_CNTL, OTG, 0), \
36 SRII(PIXEL_RATE_CNTL, OTG, 1),\
37 SRII(PIXEL_RATE_CNTL, OTG, 2),\
38 SRII(PIXEL_RATE_CNTL, OTG, 3),\
39 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
40 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
41 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
42 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn20/
H A Ddcn20_optc.h33 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
34 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
35 SRI(OTG_GSL_WINDOW_X, OTG, inst),\
36 SRI(OTG_GSL_WINDOW_Y, OTG, inst),\
37 SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\
38 SRI(OTG_DSC_START_POSITION, OTG, inst),\
39 SRI(OTG_CRC_CNTL2, OTG, inst),\
45 SRI(OTG_MANUAL_FLOW_CONTROL, OTG, inst), \
46 SRI(OTG_DRR_CONTROL, OTG, inst),\
47 SRI(OTG_PIPE_UPDATE_STATUS, OTG, inst)
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
H A Ddcn401_dccg.h77 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 0, mask_sh),\
78 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 1, mask_sh),\
79 DCCG_SFII(OTG, PIXEL_RATE_CNTL, PIPE, DTO_SRC_SEL, 2, mask_sh),\
81 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 0, mask_sh),\
82 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 1, mask_sh),\
83 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 2, mask_sh),\
84 DCCG_SFII(OTG, PIXEL_RATE_CNTL, OTG, ADD_PIXEL, 3, mask_sh),\
108 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 0, mask_sh),\
109 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 1, mask_sh),\
110 DCCG_SFII(OTG, PIXEL_RATE_CNTL, DP_DTO, ENABLE, 2, mask_sh),\
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/optc/dcn201/
H A Ddcn201_optc.h33 SRI(OTG_GLOBAL_CONTROL1, OTG, inst),\
34 SRI(OTG_GLOBAL_CONTROL2, OTG, inst),\
35 SRI(OTG_GSL_WINDOW_X, OTG, inst),\
36 SRI(OTG_GSL_WINDOW_Y, OTG, inst),\
37 SRI(OTG_VUPDATE_KEEPOUT, OTG, inst),\
38 SRI(OTG_DSC_START_POSITION, OTG, inst),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h204 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 0, index), \
207 SRII_ARR_2(PIXEL_RATE_CNTL, OTG, 3, index)
1007 SRI_ARR(OTG_H_SYNC_A, OTG, inst), SRI_ARR(OTG_H_SYNC_A_CNTL, OTG, inst), \
1008 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst), SRI_ARR(OTG_V_TOTAL, OTG, inst), \
1010 SRI_ARR(OTG_V_SYNC_A, OTG, inst), SRI_ARR(OTG_V_SYNC_A_CNTL, OTG, inst), \
1011 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \
1021 SRI_ARR(OTG_STATUS, OTG, inst), SRI_ARR(OTG_STATUS_POSITION, OTG, inst), \
1036 SRI_ARR(OTG_GSL_CONTROL, OTG, inst), SRI_ARR(OTG_CRC_CNTL, OTG, inst), \
1059 SRI_ARR(INTERRUPT_DEST, OTG, inst)
1240 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0), DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1), \
[all …]
/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dallwinner,suniv-f1c100s-usb-phy.yaml29 description: USB OTG PHY bus clock
36 description: USB OTG reset
43 description: GPIO to the USB OTG ID pin
47 description: GPIO to the USB OTG VBUS detect pin
50 description: Power supply to detect the USB OTG VBUS
53 description: Regulator controlling USB OTG VBUS
H A Dallwinner,sun8i-v3s-usb-phy.yaml32 description: USB OTG PHY bus clock
39 description: USB OTG reset
46 description: GPIO to the USB OTG ID pin
50 description: GPIO to the USB OTG VBUS detect pin
53 description: Power supply to detect the USB OTG VBUS
56 description: Regulator controlling USB OTG VBUS
H A Dallwinner,sun5i-a13-usb-phy.yaml32 description: USB OTG PHY bus clock
39 - description: USB OTG reset
49 description: GPIO to the USB OTG ID pin
53 description: GPIO to the USB OTG VBUS detect pin
56 description: Power supply to detect the USB OTG VBUS
59 description: Regulator controlling USB OTG VBUS
H A Dallwinner,sun50i-h6-usb-phy.yaml34 - description: USB OTG PHY bus clock
44 - description: USB OTG reset
54 description: GPIO to the USB OTG ID pin
58 description: GPIO to the USB OTG VBUS detect pin
61 description: Power supply to detect the USB OTG VBUS
64 description: Regulator controlling USB OTG VBUS
H A Dallwinner,sun8i-a23-usb-phy.yaml34 - description: USB OTG PHY bus clock
44 - description: USB OTG reset
54 description: GPIO to the USB OTG ID pin
58 description: GPIO to the USB OTG VBUS detect pin
61 description: Power supply to detect the USB OTG VBUS
64 description: Regulator controlling USB OTG VBUS
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
H A Ddcn30_dccg.h35 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 2),\
36 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 3),\
37 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 4),\
38 DCCG_SRII(PIXEL_RATE_CNTL, OTG, 5),\

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