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Searched refs:NumDcfClkLevelsEnabled (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h116 uint8_t NumDcfClkLevelsEnabled; member
143 uint8_t NumDcfClkLevelsEnabled; member
H A Ddcn35_clk_mgr.c948 ASSERT(clock_table->NumDcfClkLevelsEnabled > 0); in dcn35_clk_mgr_helper_populate_bw_params()
954 …num_dcfclk = (clock_table->NumDcfClkLevelsEnabled > NUM_DCFCLK_DPM_LEVELS) ? NUM_DCFCLK_DPM_LEVELS… in dcn35_clk_mgr_helper_populate_bw_params()
955 clock_table->NumDcfClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
1015 bw_params->clk_table.num_entries_per_clk.num_dcfclk_levels = clock_table->NumDcfClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()
1228 smu_dpm_clks_b->dpm_clks->NumDcfClkLevelsEnabled = in translate_to_DpmClocks_t_dcn35()
1229 smu_dpm_clks_a->dpm_clks->NumDcfClkLevelsEnabled; in translate_to_DpmClocks_t_dcn35()
1347 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn35_clk_mgr_construct()
1355 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn35_clk_mgr_construct()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0_0.h133 uint8_t NumDcfClkLevelsEnabled; member
164 uint8_t NumDcfClkLevelsEnabled; member
H A Dsmu13_driver_if_v13_0_5.h119 uint8_t NumDcfClkLevelsEnabled; member
H A Dsmu13_driver_if_yellow_carp.h131 uint8_t NumDcfClkLevelsEnabled; member
H A Dsmu13_driver_if_v13_0_4.h132 uint8_t NumDcfClkLevelsEnabled; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c492 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn315_clk_mgr_helper_populate_bw_params()
501 if (i == clock_table->NumDcfClkLevelsEnabled - 1) in dcn315_clk_mgr_helper_populate_bw_params()
531 } else if (clock_table->NumDcfClkLevelsEnabled != clock_table->NumSocClkLevelsEnabled) { in dcn315_clk_mgr_helper_populate_bw_params()
684 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn315_clk_mgr_construct()
691 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn315_clk_mgr_construct()
H A Ddcn315_smu.h78 uint8_t NumDcfClkLevelsEnabled; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.h59 uint8_t NumDcfClkLevelsEnabled; member
H A Ddcn314_clk_mgr.c649 for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) { in dcn314_clk_mgr_helper_populate_bw_params()
866 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn314_clk_mgr_construct()
873 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn314_clk_mgr_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.h86 uint8_t NumDcfClkLevelsEnabled; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.h140 uint8_t NumDcfClkLevelsEnabled; member
H A Ddcn31_clk_mgr.c757 smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled, in dcn31_clk_mgr_construct()
764 for (i = 0; i < smu_dpm_clks.dpm_clks->NumDcfClkLevelsEnabled; i++) { in dcn31_clk_mgr_construct()