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Searched refs:MP1_Public (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmu9_smumgr.c34 #define MP1_Public 0x03b00000 macro
44 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu9_is_smc_ram_running()
H A Dvega20_smumgr.c41 #define MP1_Public 0x03b00000 macro
54 mp1_fw_flags = RREG32_PCIE(MP1_Public | in vega20_is_smc_ram_running()
H A Dsmu10_smumgr.c43 #define MP1_Public 0x03b00000 macro
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v12_0.h31 #define MP1_Public 0x03b00000 macro
H A Dsmu_v14_0.h38 #define MP1_Public 0x03b00000 macro
H A Dsmu_v11_0.h43 #define MP1_Public 0x03b00000 macro
H A Dsmu_v13_0.h33 #define MP1_Public 0x03b00000 macro
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0.c134 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v14_0_load_microcode()
136 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v14_0_load_microcode()
141 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_load_microcode()
144 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_load_microcode()
214 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_check_fw_status()
217 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v14_0_check_fw_status()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c159 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()
161 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v13_0_load_microcode()
165 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_load_microcode()
239 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()
243 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_check_fw_status()
2543 WREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff), 0); in smu_v13_0_disable_pmfw_state()
2545 ret = RREG32_PCIE(MP1_Public | in smu_v13_0_disable_pmfw_state()
H A Dsmu_v13_0_12_ppt.c38 #undef MP1_Public
H A Dsmu_v13_0_6_ppt.c54 #undef MP1_Public
58 #define MP1_Public 0x03b00000 macro
1035 RREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff)); in smu_v13_0_6_check_fw_status()
H A Dsmu_v13_0_7_ppt.c398 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v13_0_7_check_fw_status()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Dsmu_v12_0.c63 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v12_0_check_fw_status()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c160 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode()
162 WREG32_PCIE(MP1_Public | (smnMP1_PUB_CTRL & 0xffffffff), in smu_v11_0_load_microcode()
166 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_load_microcode()
185 mp1_fw_flags = RREG32_PCIE(MP1_Public | in smu_v11_0_check_fw_status()
H A Dsienna_cichlid_ppt.c2998 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_START); in sienna_cichlid_stb_init()
3008 reg = RREG32_PCIE(MP1_Public | smnMP1_PMI_3_FIFO); in sienna_cichlid_stb_init()
3085 *p++ = cpu_to_le32(RREG32_PCIE(MP1_Public | smnMP1_PMI_3)); in sienna_cichlid_stb_get_data_direct()