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Searched refs:MMSCH_V4_0_INSERT_DIRECT_WT (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c1047 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1052 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1054 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1056 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1058 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1064 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1067 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1070 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1073 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
1089 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0, in vcn_v4_0_3_start_sriov()
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H A Dvcn_v4_0.c1411 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1416 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1419 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1422 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1425 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1431 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1434 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1437 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1440 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
1476 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, i, in vcn_v4_0_start_sriov()
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H A Dmmsch_v4_0.h115 #define MMSCH_V4_0_INSERT_DIRECT_WT(reg, value) { \ macro
H A Djpeg_v4_0.c471 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
474 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
477 MMSCH_V4_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(JPEG, 0, in jpeg_v4_0_start_sriov()
H A Djpeg_v4_0_3.c282 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
284 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring->gpu_addr)); in jpeg_v4_0_3_start_sriov()
286 MMSCH_V4_0_INSERT_DIRECT_WT(tmp, ring->ring_size / 4); in jpeg_v4_0_3_start_sriov()