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Searched refs:MMC_TIMING_MMC_HS200 (Results 1 – 25 of 34) sorted by relevance

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/linux-6.15/drivers/mmc/core/
H A Dhost.h68 return card->host->ios.timing == MMC_TIMING_MMC_HS200; in mmc_card_hs200()
H A Ddebugfs.c150 case MMC_TIMING_MMC_HS200: in mmc_ios_show()
H A Dhost.c256 &map->phase[MMC_TIMING_MMC_HS200]); in mmc_of_parse_clk_phase()
H A Dmmc.c1312 mmc_set_timing(host, MMC_TIMING_MMC_HS200); in mmc_hs400_to_hs200()
1502 mmc_set_timing(host, MMC_TIMING_MMC_HS200); in mmc_select_hs200()
/linux-6.15/drivers/mmc/host/
H A Dsdhci-of-arasan.c777 case MMC_TIMING_MMC_HS200: in sdhci_zynqmp_sdcardclk_set_phase()
846 case MMC_TIMING_MMC_HS200: in sdhci_zynqmp_sampleclk_set_phase()
906 case MMC_TIMING_MMC_HS200: in sdhci_versal_sdcardclk_set_phase()
973 case MMC_TIMING_MMC_HS200: in sdhci_versal_sampleclk_set_phase()
1021 case MMC_TIMING_MMC_HS200: in sdhci_versal_net_emmc_sdcardclk_set_phase()
1292 zynqmp_oclk_phase[MMC_TIMING_MMC_HS200] = 90; in arasan_dt_parse_clk_phases()
1341 arasan_dt_read_clk_phase(dev, clk_data, MMC_TIMING_MMC_HS200, in arasan_dt_parse_clk_phases()
H A Ddw_mmc-hi3798cv200.c56 else if (ios->timing == MMC_TIMING_MMC_HS200) in dw_mci_hi3798cv200_set_ios()
H A Dsdhci-cadence.c269 if (host->timing != MMC_TIMING_MMC_HS200 && in sdhci_cdns_execute_tuning()
307 case MMC_TIMING_MMC_HS200: in sdhci_cdns_set_uhs_signaling()
H A Ddw_mmc-hi3798mv200.c162 priv->phase_map.phase[MMC_TIMING_MMC_HS200].in_deg = degrees[mid]; in dw_mci_hi3798mv200_execute_tuning_mix_mode()
H A Dsdhci-xenon.c206 if (timing == MMC_TIMING_MMC_HS200) in xenon_set_uhs_signaling()
293 (ios->timing == MMC_TIMING_MMC_HS200) || in xenon_set_ios()
H A Dmmci_stm32_sdmmc.c418 host->mmc->ios.timing == MMC_TIMING_MMC_HS200) { in sdmmc_get_dctrl_cfg()
630 host->mmc->ios.timing != MMC_TIMING_MMC_HS200) || in sdmmc_execute_tuning()
H A Dsdhci-pci-arasan.c277 case MMC_TIMING_MMC_HS200: in arasan_select_phy_clock()
H A Dsdhci-of-esdhc.c48 .max_clk[MMC_TIMING_MMC_HS200] = 116700000,
54 .max_clk[MMC_TIMING_MMC_HS200] = 167000000,
60 .max_clk[MMC_TIMING_MMC_HS200] = 125000000,
H A Dsdhci-sprd.c111 { "sprd,phy-delay-mmc-hs200", MMC_TIMING_MMC_HS200, },
364 case MMC_TIMING_MMC_HS200: in sdhci_sprd_set_uhs_signaling()
H A Dsdhci-st.c286 case MMC_TIMING_MMC_HS200: in sdhci_st_set_uhs_signaling()
H A Ddw_mmc-rockchip.c262 case MMC_TIMING_MMC_HS200: in dw_mci_rk3288_set_ios()
H A Dsdhci-pci-o2micro.c329 if ((host->timing != MMC_TIMING_MMC_HS200) && in sdhci_o2_execute_tuning()
354 if (host->timing == MMC_TIMING_MMC_HS200 || in sdhci_o2_execute_tuning()
H A Dsdhci-brcmstb.c169 if ((timing == MMC_TIMING_MMC_HS200) || in sdhci_brcmstb_set_uhs_signaling()
H A Dsdhci-omap.c1126 MMC_TIMING_MMC_HS200 + 1, in sdhci_omap_config_iodelay_pinctrl_state()
1195 pinctrl_state[MMC_TIMING_MMC_HS200] = state; in sdhci_omap_config_iodelay_pinctrl_state()
H A Dsdhci-of-dwcmshc.c421 if ((timing == MMC_TIMING_MMC_HS200) || in dwcmshc_set_uhs_signaling()
650 if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 || in dwcmshc_rk3568_set_clock()
H A Dsdhci-xenon-phy.c780 case MMC_TIMING_MMC_HS200: in xenon_hs_delay_adj()
H A Dsdhci-msm.c1142 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_msm_is_tuning_needed()
1350 case MMC_TIMING_MMC_HS200: in sdhci_msm_set_uhs_signaling()
1368 uhs == MMC_TIMING_MMC_HS200 || in sdhci_msm_set_uhs_signaling()
H A Dsdhci-esdhc-imx.c1256 case MMC_TIMING_MMC_HS200: in esdhc_change_pinstate()
1336 case MMC_TIMING_MMC_HS200: in esdhc_set_uhs_signaling()
H A Dsdhci-acpi.c552 host->timing == MMC_TIMING_MMC_HS200) { in amd_set_ios()
/linux-6.15/include/linux/mmc/
H A Dhost.h64 #define MMC_TIMING_MMC_HS200 9 macro
/linux-6.15/drivers/staging/greybus/
H A Dsdio.c671 case MMC_TIMING_MMC_HS200: in gb_mmc_set_ios()

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