| /linux-6.15/Documentation/devicetree/bindings/display/bridge/ |
| H A D | toshiba,tc358762.yaml | 7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
37 Video port for MIPI DSI input
42 Video port for MIPI DPI output (panel or connector).
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| H A D | lontium,lt9211.yaml | 41 Primary MIPI DSI port-1 for MIPI input or
47 Additional MIPI port-2 for MIPI input or LVDS port-2
54 Primary MIPI DSI port-1 for MIPI output or
60 Additional MIPI port-2 for MIPI output or LVDS port-2
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| H A D | lontium,lt9611.yaml | 7 title: Lontium LT9611(UXC) 2 Port MIPI to HDMI Bridge
35 description: Regulator for 1.8V MIPI phy power.
47 Primary MIPI port-1 for MIPI input
52 Additional MIPI port-2 for MIPI input, used in combination
53 with primary MIPI port-1 to drive higher resolution displays
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| H A D | intel,keembay-dsi.yaml | 19 - description: MIPI registers range
27 - description: MIPI DSI clock
28 - description: MIPI DSI econfig clock
29 - description: MIPI DSI config clock
43 description: MIPI DSI input port.
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| H A D | chipone,icn6211.yaml | 7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
15 It has a flexible configuration of MIPI DSI signal input and
40 description: A 1.8V/2.5V/3.3V supply that power the MIPI RX.
56 Video port for MIPI DSI input
76 Video port for MIPI DPI output (panel or connector).
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| H A D | fsl,imx93-mipi-dsi.yaml | 7 title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
13 There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
14 Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations
45 configurations from LCDIF display controller to the MIPI DSI host
46 controller and MIPI DPHY PLL related configurations through PLL SoC
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| /linux-6.15/Documentation/driver-api/media/drivers/ccs/ |
| H A D | ccs.rst | 7 MIPI CCS camera sensor driver
10 The MIPI CCS camera sensor driver is a generic driver for `MIPI CCS
19 The MIPI CCS driver supports CCS static data for all compliant devices,
35 vvvv or vv denotes MIPI and SMIA manufacturer IDs respectively, mmmm model ID
41 `CCS tools <https://github.com/MIPI-Alliance/ccs-tools/>`_ is a set of
49 The ccs-regs.asc file contains MIPI CCS register definitions that are used
78 The PLL model implemented by the PLL calculator corresponds to MIPI CCS 1.1.
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| /linux-6.15/drivers/media/platform/cadence/ |
| H A D | Kconfig | 6 tristate "Cadence MIPI-CSI2 RX Controller"
14 Support for the Cadence MIPI CSI2 Receiver controller.
20 tristate "Cadence MIPI-CSI2 TX Controller"
26 Support for the Cadence MIPI CSI2 Transceiver controller.
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| /linux-6.15/Documentation/devicetree/bindings/media/xilinx/ |
| H A D | xlnx,csi2rxss.yaml | 7 title: Xilinx MIPI CSI-2 Receiver Subsystem
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
118 connects to MIPI CSI-2 source like sensor.
196 /* MIPI CSI-2 Camera handle */
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| /linux-6.15/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip-mipi-dphy-rx0.yaml | 7 title: Rockchip SoC MIPI RX0 D-PHY
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
23 - description: MIPI D-PHY ref clock
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
|
| H A D | samsung,mipi-video-phy.yaml | 7 title: Samsung S5P/Exynos SoC MIPI CSIS/DSIM DPHY
17 0 - MIPI CSIS 0,
18 1 - MIPI DSIM 0,
19 2 - MIPI CSIS 1,
20 3 - MIPI DSIM 1.
24 4 - MIPI CSIS 2.
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| /linux-6.15/Documentation/admin-guide/media/ |
| H A D | starfive_camss.rst | 31 | MIPI |----->| |----->| ISP |----->| |
42 - MIPI: The MIPI interface, receiving data from a MIPI CSI-2 camera sensor.
72 - imx219: an image sensor, image data is sent through MIPI CSI-2.
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| /linux-6.15/Documentation/devicetree/bindings/media/i2c/ |
| H A D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
20 MIPI CSI-2 clock is continuous or non-continuous.
25 For further information on the MIPI CSI-2 endpoint node properties, see
|
| H A D | thine,thp7312.yaml | 17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
18 or parallel. The hardware is capable of transmitting and receiving MIPI
54 1.2V supply for core, PLL, MIPI rx and MIPI tx.
58 Supply for input (RX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
62 Supply for output (TX). 1.8V for MIPI, or 1.8/2.8/3.3V for parallel.
|
| H A D | isil,isl79987.yaml | 7 title: Intersil ISL79987 Analog to MIPI CSI-2 decoder
14 The Intersil ISL79987 is an analog to MIPI CSI-2 decoder which is capable of
15 receiving up to four analog stream and multiplexing them into up to four MIPI
16 CSI-2 virtual channels, using one MIPI clock lane and 1/2 data lanes.
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| /linux-6.15/drivers/phy/amlogic/ |
| H A D | Kconfig | 41 tristate "Meson G12A MIPI Analog DPHY driver"
48 Enable this to support the Meson MIPI Analog DPHY found in Meson G12A
81 Enable this to support the Meson MIPI + PCIE PHY found
86 tristate "Meson AXG MIPI + PCIE analog PHY driver"
93 Enable this to support the Meson MIPI + PCIE analog PHY
98 tristate "Meson AXG MIPI DPHY driver"
105 Enable this to support the Meson MIPI DPHY found in Meson AXG
|
| /linux-6.15/Documentation/devicetree/bindings/i3c/ |
| H A D | mipi-i3c-hci.yaml | 7 title: MIPI I3C HCI
16 MIPI I3C Host Controller Interface
18 The MIPI I3C HCI (Host Controller Interface) specification defines
19 a common software driver interface to support compliant MIPI I3C
|
| /linux-6.15/drivers/phy/rockchip/ |
| H A D | Kconfig | 13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
52 tristate "Rockchip Innosilicon MIPI CSI PHY driver"
57 Enable this to support the Rockchip MIPI CSI PHY with
61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
66 Enable this to support the Rockchip MIPI/LVDS/TTL PHY with
87 tristate "Rockchip Samsung MIPI DCPHY driver"
92 Enable this to support the Rockchip MIPI DCPHY with
|
| /linux-6.15/Documentation/driver-api/soundwire/ |
| H A D | summary.rst | 5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
58 The MIPI SoundWire specification uses the term 'device' to refer to a Master
69 Programs all the MIPI-defined Slave registers. Represents a SoundWire
77 Driver controlling the Slave device. MIPI-specified registers are controlled
133 MIPI specification, so Bus calls the "sdw_master_port_ops" callback
141 The MIPI specification requires each Slave interface to expose a unique
154 board-file, ACPI or DT. The MIPI Software specification defines additional
190 SoundWire MIPI specification 1.1 is available at:
193 SoundWire MIPI DisCo (Discovery and Configuration) specification is
197 (publicly accessible with registration or directly accessible to MIPI
[all …]
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| /linux-6.15/Documentation/devicetree/bindings/media/ |
| H A D | imx.txt | 27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
28 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
39 - clocks : the MIPI CSI-2 receiver requires three clocks: hsi_tx
46 connecting with a MIPI CSI-2 source, and ports 1
49 MIPI CSI-2 virtual channel outputs.
|
| H A D | samsung,exynos4210-csis.yaml | 7 title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
63 description: MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V).
66 description: MIPI CSIS Core voltage supply (e.g. 1.1V).
159 /* Camera D (4) MIPI CSI-2 (CSIS1) */
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| /linux-6.15/drivers/i3c/master/ |
| H A D | Kconfig | 17 Support for Synopsys DesignWare MIPI I3C Controller.
48 tristate "MIPI I3C Host Controller Interface driver (EXPERIMENTAL)"
52 Support for hardware following the MIPI Aliance's I3C Host Controller
62 tristate "MIPI I3C Host Controller Interface PCI support"
66 Support for MIPI I3C Host Controller Interface compatible hardware
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| /linux-6.15/drivers/hwtracing/stm/ |
| H A D | Kconfig | 7 Trace Protocol (STP) format as defined by MIPI STP standards.
20 exclusively until the MIPI SyS-T support was added. Use this
23 The receiving side only needs to be able to decode the MIPI
30 tristate "MIPI SyS-T STM framing protocol driver"
33 This is an implementation of MIPI SyS-T protocol to be used
39 addition to the MIPI STP, in order to extract the data.
|
| /linux-6.15/Documentation/trace/ |
| H A D | sys-t.rst | 4 MIPI SyS-T over STP
7 The MIPI SyS-T protocol driver can be used with STM class devices to
11 In order to use the MIPI SyS-T protocol driver with your STM device,
33 Now, with the MIPI SyS-T protocol driver, each policy node in the
52 MIPI SyS-T message header. It is off by default as the STP already
|
| /linux-6.15/Documentation/devicetree/bindings/soundwire/ |
| H A D | qcom,soundwire.yaml | 82 More info in MIPI Alliance SoundWire 1.0 Specifications.
93 More info in MIPI Alliance SoundWire 1.0 Specifications.
104 More info in MIPI Alliance SoundWire 1.0 Specifications.
115 More info in MIPI Alliance SoundWire 1.0 Specifications.
126 More info in MIPI Alliance SoundWire 1.0 Specifications.
137 More info in MIPI Alliance SoundWire 1.0 Specifications.
150 More info in MIPI Alliance SoundWire 1.0 Specifications.
167 More info in MIPI Alliance SoundWire 1.0 Specifications.
184 More info in MIPI Alliance SoundWire 1.0 Specifications.
200 More info in MIPI Alliance SoundWire 1.0 Specifications.
|