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Searched refs:MII_TG3_DSP_RW_PORT (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/net/ethernet/broadcom/
H A Dtg3.c1288 err = tg3_readphy(tp, MII_TG3_DSP_RW_PORT, val); in tg3_phydsp_read()
1299 err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val); in tg3_phydsp_write()
2477 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, in tg3_phy_write_and_check_testpat()
2514 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001); in tg3_phy_write_and_check_testpat()
2515 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005); in tg3_phy_write_and_check_testpat()
2536 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000); in tg3_phy_reset_chanpat()
2724 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b); in tg3_phy_reset()
2728 tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b); in tg3_phy_reset()
6016 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2); in tg3_serdes_parallel_detect()
6017 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &phy2); in tg3_serdes_parallel_detect()
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H A Dtg3.h2300 #define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */ macro