Searched refs:MCI_STATUS_MISCV (Results 1 – 10 of 10) sorted by relevance
18 #define MCI_STATUS_MISCV (1ULL << 59) /* misc error reg. valid */ macro
566 if (!mca_cfg.ser || !(m->status & MCI_STATUS_MISCV)) in whole_page()686 if (m->status & MCI_STATUS_MISCV) in mce_read_aux()695 if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) { in mce_read_aux()860 MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV| in quirk_sandybridge_ifu()864 MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S| in quirk_sandybridge_ifu()907 MCI_STATUS_ADDRV | MCI_STATUS_MISCV | MCI_STATUS_PCC | in quirk_skylake_repmov()910 MCI_STATUS_ADDRV | MCI_STATUS_MISCV | in quirk_skylake_repmov()
52 m->status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | MCI_STATUS_MISCV | 0x9f; in apei_mce_report_mem_error()
508 if (!(m->status & MCI_STATUS_MISCV)) in intel_mce_usable_address()
70 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
514 i_mce.status |= MCI_STATUS_MISCV; in do_inject()
156 MCI_STATUS_MISCV | MCI_STATUS_ADDRV | 0x10090; in inject_ucna()
39 #define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */ macro
479 if ((mce->status & (MCI_STATUS_MISCV | MCI_STATUS_ADDRV)) in i10nm_mc_decode_available()480 != (MCI_STATUS_MISCV | MCI_STATUS_ADDRV)) in i10nm_mc_decode_available()
813 ((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"), in amd_decode_mce()